SEM Q&A: Get Answers to Your Questions Now!

[xlee790]

I have two questions about SEM which is in the attachment, need your instructions...thanks in advance..

 

[Modey3]

xlee790,

To answer question-1. You will more likely make the surface positively charged because your electron beam will knock-off secondary electrons from the surface silicon atoms and since silicon is a poor conductor charging will occur. There is no doubt that knocking out secondary electrons will raise the conductivity of the silicon wafer through the creation of defect states (p-type) in the band-gap. It's really a question of Si conductivity vs. electron beam current. You get the same situation in a TEM, but most of the electrons tend to go through the material.

Question 2: If the instrument's walls are grounded the secondary electrons will usually go to ground through the walls.

Hope this helps

modey3

 

[xlee790]

Thanks modey3 for your detailed answers,


But I think although Secondary Electrons (SE) are knocked out of the wafer surface, there are great amount of "new" electrons emitting from the gun impinge on the wafer that will compensate the loss of SE's. So there are two situations:
a) SE Yield <1, means there are excessive electrons on the wafer, thus negatively charged wafer surface is achieved ? ( suppose no/few electrons go through the silicon)
b) SE Yield>1, More SE's are generated and then grounded as you said, hence it's possible to have a positive surface filled with holes. And an external positive voltage/efield will prevent the positive holes from going deeper into the wafer, namely they are likely to be kept on the wafer surface...




xlee790

 

[Modey3]

"But I think although Secondary Electrons (SE) are knocked out of the wafer surface, there are great amount of "new" electrons emitting from the gun impinge on the wafer that will compensate the loss of SE's."

Thats actually not true because one primary electron (from the gun) will create many more secondary electron through collisions. Secondary electrons actually don't have a lot of energy compared to the primary electron beam energy. Positive charging can in fact occur and does occur in insulators.

"b) SE Yield>1, More SE's are generated and then grounded as you said, hence it's possible to have a positive surface filled with holes. And an external positive voltage/efield will prevent the positive holes from going deeper into the wafer, namely they are likely to be kept on the wafer surface..."

Thats true, but most SEMs I've ever operated had a sample stage that was grounded and not kept at a potential.

modey3

 

[xlee790]

Thanks for correcting me...

But the primary beam energy(PBE) can be tuned, SE Yield is a function of PBE, so SE yield <1 is still possible ?

Yes, for review SEM, the stage is always grouned.

The tool I operate is an inspection SEM, for which flooding is used to make the electrons more uniformly distributed on the wafer surface before real inspection, so as to reduce brightness variation.

 

[Modey3]

Yes, you can "tune" the beam energy so that it has a SE Yield < 1, but I do not know what the appropriate energy is for silicon.

I think I understand your problem better. Since the base of the Si wafer is biased positively with respect to ground current from the surface will drain if the surface becomes negatively biased with respect to the base. The surface bias is controlled by the flooding beam. You are essentially creating a n-type semiconductor on the surface. These charge carriers will drift due to the local surface field and entropy. However, the positive potential applied to the base isn't felt by the electrons at the surface because of the depletion layer between the semiconductor-metal contact. Current will drain but very slowly and will be a strong function of temperature.

modey3

 

[xlee790]

Modey3,

Let me summarize what you have said:
1) It's possible to make the wafer surface positively charged by flooding
2) It is the Flooding/Primary Beam that makes the wafer surface positively/negatively charged rather than bias that applied to the wafer stage.
3) Stage bias will not affect or has slight impact on the surface charge carriers.
4) The charges generated by flooding will be kept on the surface due to low drain-rate. ( suppose the temp in the chamber will not vary/fluctuate)

Thanks

 

[Modey3]

xlee790,

You're summarization is correct! You would have to put a large positive bias on the metal-contact (connected to the Si chip) so that the depletion layer is 'near' the surface in order to drain the surface charge at a rate which will affect the flooding application. The problem is essentially an anode/cathode type problem with a dielectric (Si) between the two and the cathode (the surface) is emitting electrons. This problem is frequently encountered in plasma-physics and electrochemisty.

modey3