Understanding of the Boot strap capacitor Waveforms

[PhysicsTest]

TL;DR

I want to understand the Mosfet driver boot strap capacitor waveforms.

i have captured the boot strap capacitor waveforms which i have captured while doing the motor testing.

Measurement data:
Differential probe with 20 as factor, hence the difference is (2.14 - 1.14 )*20 = 20V.
Positive side of probe on VB, negative side on Vs.
There is offset of -640mV = 0.64*20 = 12.8V

I have attached the driver IC data sheet, i gave VCC = 12V.
My understanding of the waveform when the low side is ON the CBS gets charged to VCC (12V) and when high side is ON VS = DC bus voltage which is 48V, VB = VS + VBS = 48V + 12V = 60V ; VGS = 12V.
I expected that voltage across bootstrap stayed at 12V with small ripples, but it is getting charged upto 20V, The 20V is the maximum value as per the data sheet. Can you please explain what mistake i am doing.

 

[Baluncore]

What you have there is half of an "H-bridge". The "To Load" terminals should be tied together, and connected to one side of the load.

For Vcc = 12V, the capacitor will be charged to Vcap = 12V while the lower switch is on, as the lower leg of the capacitor is effectively pulled to ground.

When the lower switch turns off, the upper switch has the 12V capacitor voltage available to drive its gate high, (relative to the upper switch Vs). In the circuit shown, the lower terminal of the capacitor will be at 650V, with the upper terminal of the capacitor, above the high voltage rail, at 650V + 12V = 662V.

While idle, the lower switch should be kept on, to maintain Vcap = 12V.

The upper switch should be turned on for a limited duration, as the capacitor voltage will gradually sag, and loose the ability to keep the upper switch conducting.