pulse width is the duration which your signal is at the on-state, your course might a different and probably more specific way to say it.
max clk freq depends on the slew rate of your components I would imagine.
I can't really talk because I've been in your position but start revising earlier really makes life easier at these times XD
The signal used to clock a latch or flip flop is usually a square wave but it doesn't have to be. It can have a variable mark/space ratio.
Depending on the type of latch there might be a minimum duration for the "mark" (or pulse) regardless of the frequency. For example a latch may not work properly if you feed it a 1 picosecond wide pulse every 1uS. The frequency (1MHz) might be OK but the pulse width (1 picosecond) might be too short for the latch to operate correctly.
Similarly the latch might have a minimum duration for the "space".
The maximum clock frequency is usually determined by the minimum mark plus the minimum space specified for the latch. If the minimum mark was 1.5nS and the minimum space was 2.5nS then the minimum cycle time is 4nS and the max frequency is about 1/(4 *10^-9) = 250MHz. However there might be other factors that limit the clock maximum speed.