Inhibiting NAND & NOT Gates - Active High or Low?

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Homework Help Overview

The discussion revolves around the concept of inhibiting NAND and NOT gates, specifically questioning whether the inhibition is active high or active low. Participants are exploring the meaning and implications of inhibiting logic gates in digital circuits.

Discussion Character

  • Conceptual clarification, Assumption checking

Approaches and Questions Raised

  • Participants are questioning the definition of "inhibit" in the context of logic gates and exploring the possible interpretations of the term. Some are considering the relationship between inhibition and the behavior of AND and OR gates.

Discussion Status

The discussion is ongoing, with participants sharing their uncertainties and interpretations. Some guidance has been offered regarding the behavior of AND and OR gates when certain inputs are tied high or low, but there is no consensus on the original question about NAND and NOT gates.

Contextual Notes

There appears to be confusion regarding the terminology used in the question, as "inhibit" is not commonly recognized in engineering contexts. Participants are also noting the complexity of boolean combinations for gates.

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Homework Statement


How can you inhibit NAND & NOT gate ? Mention whether the inhibit is active high or active low ?


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The Attempt at a Solution



No clue to this question
 
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What does it mean to inhibit a gate?
 
i myself don't know ? there are 16 boolean combinations for a 2 input gate & inhibit is one of them but i don't know more about it
 
After some googling, the "inhibit gate" seems to be just an AND gate with one of the inputs called "the condition" or something like that. Perhaps the problem is asking you to build an AND gate from a NAND gate and from a NOR gate.
 
"Inhibit" is not a term that most engineers would recognize. I suppose the question is asking "how do you disable a gate, so it's output remains constant."

If you tie one input of an AND gate low, then it's output will always be low, no matter what happens on the other inputs.

If you tie one input of an OR gate high, then it's output will always be high, no matter what happens on the other inputs.

- Warren
 

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