Draw a NAND-gate to get that output

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In summary, the conversation is about drawing a circuit using exclusively NAND gates with two inputs to output the value $[(a \lor b) \lor (c \lor \neg d)] \land (c \land \neg a)$. The conversation includes a hint to use inverters and a discussion on how to write negation in terms of NAND gates. The final result is a long expression using NAND gates to represent the desired circuit.
  • #1
mathmari
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Hey! 😊

I want to draw a circuit that has four inputs a, b, c, d, and which gives the value $[(a \lor b) \lor (c \lor \neg d)] \land (c \land \neg a)$ at the output, using exclusively the NAND gates with two inputs.
Hint: If you connect the two inputs of such a NAND gate, you get a so-called inverter, i.e. a circuit implementation of the logical negation.

The NAND-gate is:
nand.JPG


I have done the following:
\begin{align*}[(a\lor b)\lor (c\lor \neg d)]\land (c\land \neg a)&=[\neg (\neg a\land \neg b)\lor \neg (\neg c\land d)]\land (c\land \neg a)\\ & =\neg [(\neg a\land \neg b)\land (\neg c\land d)]\land (c\land \neg a)\end{align*}
We can get the part $\neg [(\neg a\land \neg b)\land (\neg c\land d)]$ using the NAND gate, right? What about the second part? Do we have to write it in an other way? :unsure:
 
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  • #2
mathmari said:
We can get the part $\neg [(\neg a\land \neg b)\land (\neg c\land d)]$ using the NAND gate, right? What about the second part? Do we have to write it in an other way?
Hey mathmari!

Yep.
We can apply inverters both before and after a NAND gate can't we?
That is, we can write $x\land y$ as $\lnot\lnot(x\land y)$ can't we? 🤔
 
  • #3
Klaas van Aarsen said:
We can apply inverters both before and after a NAND gate can't we?
That is, we can write $x\land y$ as $\lnot\lnot(x\land y)$ can't we? 🤔

I got stuck right now. We have that \begin{align*}[(a\lor b)\lor (c\lor \neg d)]\land (c\land \neg a)&=[\neg (\neg a\land \neg b)\lor \neg (\neg c\land d)]\land (c\land \neg a)\\ & =\neg [(\neg a\land \neg b)\land (\neg c\land d)]\land (c\land \neg a) \\ & = [(\neg a\land \neg b) \text{ NAND } (\neg c\land d)]\land (c\land \neg a)\end{align*}

Now we have to write $\neg a\land \neg b$ in terms of $\text{ NAND } $.

So do we have to write the negartion $\neg$ in terms of $\text{ NAND } $ ? :unsure:
 
  • #4
Yes.
Consider the hint that was given in the problem statement: "Hint: If you connect the two inputs of such a NAND gate, you get a so-called inverter." 🤔
 
  • #5
Klaas van Aarsen said:
Yes.
Consider the hint that was given in the problem statement: "Hint: If you connect the two inputs of such a NAND gate, you get a so-called inverter." 🤔

We have the following:
\begin{align*}&\neg a=\neg (a\land a)=a \text{ NAND } a \\ & \neg b=\neg (b\land b)=b \text{ NAND } b \\ & \neg c=\neg (c\land c)=c \text{ NAND } c\end{align*}

Therefore we get \begin{align*}[(a\lor b)\lor (c\lor \neg d)]\land (c\land \neg a)&=[\neg (\neg a\land \neg b)\lor \neg (\neg c\land d)]\land (c\land \neg a)\\ & =\neg [(\neg a\land \neg b)\land (\neg c\land d)]\land (c\land \neg a) \\ & = [(\neg a\land \neg b) \text{ NAND } (\neg c\land d)]\land (c\land \neg a) \\ & = [([a \text{ NAND } a ]\land [b \text{ NAND } b]) \text{ NAND } ([c \text{ NAND } c]\land d)]\land (c\land [a \text{ NAND } a ])\end{align*}

Is everything correct so far? How could we continue? I am a bit confused how we get the $\neg$ before an expression to get $\text{NAND}$ without losing $\land$. Could you give me a hint? :unsure:
 
  • #6
mathmari said:
Is everything correct so far? How could we continue? I am a bit confused how we get the $\neg$ before an expression to get $\text{NAND}$ without losing $\land$. Could you give me a hint?
It looks correct to me.
Did you consider that $x\land y=\lnot\lnot(x\land y)=\lnot(x \operatorname{NAND} y) = (x \operatorname{NAND} y) \operatorname{NAND}\, (x \operatorname{NAND} y) $? 🤔
 
  • #7
Klaas van Aarsen said:
It looks correct to me.
Did you consider that $x\land y=\lnot\lnot(x\land y)=\lnot(x \operatorname{NAND} y) = (x \operatorname{NAND} y) \operatorname{NAND}\, (x \operatorname{NAND} y) $? 🤔

Ok!

We have the following:
\begin{align*}&\neg a=\neg (a\land a)=a \text{ NAND } a \\ & \neg b=\neg (b\land b)=b \text{ NAND } b \\ & \neg c=\neg (c\land c)=c \text{ NAND } c \\ & x\land y=\lnot\lnot(x\land y)=\lnot(x \operatorname{NAND} y) = (x \operatorname{NAND} y) \operatorname{NAND}\, (x \operatorname{NAND} y)\end{align*}

Therefore we get \begin{align*}&[(a\lor b)\lor (c\lor \neg d)]\land (c\land \neg a)=[\neg (\neg a\land \neg b)\lor \neg (\neg c\land d)]\land (c\land \neg a)\\ & =\neg [(\neg a\land \neg b)\land (\neg c\land d)]\land (c\land \neg a) \\ & = [(\neg a\land \neg b) \text{ NAND } (\neg c\land d)]\land (c\land \neg a) \\ & = [([a \text{ NAND } a ]\land [b \text{ NAND } b]) \text{ NAND } ([c \text{ NAND } c]\land d)]\land (c\land [a \text{ NAND } a ]) \\ & = [(([a \text{ NAND } a ] \operatorname{NAND} [b \text{ NAND } b]) \operatorname{NAND}\, ([a \text{ NAND } a ] \operatorname{NAND} [b \text{ NAND } b])) \text{ NAND } ([c \text{ NAND } c] \operatorname{NAND} d) \operatorname{NAND}\, ([c \text{ NAND } c] \operatorname{NAND} d)]\land ((c \operatorname{NAND} [a \text{ NAND } a ]) \operatorname{NAND}\, (c \operatorname{NAND} [a \text{ NAND } a ])) \\ & = ([(([a \text{ NAND } a ] \operatorname{NAND} [b \text{ NAND } b]) \operatorname{NAND}\, ([a \text{ NAND } a ] \operatorname{NAND} [b \text{ NAND } b])) \text{ NAND } ([c \text{ NAND } c] \operatorname{NAND} d) \operatorname{NAND}\, ([c \text{ NAND } c] \operatorname{NAND} d)]\text{ NAND} ((c \operatorname{NAND} [a \text{ NAND } a ]) \operatorname{NAND}\, (c \operatorname{NAND} [a \text{ NAND } a ])))\text{ NAND } ([(([a \text{ NAND } a ] \operatorname{NAND} [b \text{ NAND } b]) \operatorname{NAND}\, ([a \text{ NAND } a ] \operatorname{NAND} [b \text{ NAND } b])) \text{ NAND } ([c \text{ NAND } c] \operatorname{NAND} d) \operatorname{NAND}\, ([c \text{ NAND } c] \operatorname{NAND} d)]\text{ NAND} ((c \operatorname{NAND} [a \text{ NAND } a ]) \operatorname{NAND}\, (c \operatorname{NAND} [a \text{ NAND } a ])))\end{align*}

Is it possible to simply that expression or shoud we have simplied it before the last step? :unsure:

Or is that the answer, since the exercise asks to draw the gate? :unsure:
 
  • #8
mathmari said:
Is it possible to simply that expression or shoud we have simplied it before the last step?
Or is that the answer, since the exercise asks to draw the gate?
I think we should draw the circuit.
The same expressions occur many times, and instead of repeating them, we should reuse them. 🤔
 
  • #9
Klaas van Aarsen said:
I think we should draw the circuit.
The same expressions occur many times, and instead of repeating them, we should reuse them. 🤔

The last expression of #7 is so confusing, this last one is the one that I have to draw, or which expression should I consider?
I have to start with all small expressions and then getting to the larger ones, right? :unsure:
 
  • #10
mathmari said:
The last expression of #7 is so confusing, this last one is the one that I have to draw, or which expression should I consider?
I have to start with all small expressions and then getting to the larger ones, right?
I'd recommend starting with an expression in which the expressions of the form $\lnot x$ have not been expanded yet to $x \operatorname{NAND} x$.
Because that is where $x$ is getting duplicated while in a drawing we only want to see $x$ once. 🤔
 
  • #11
Klaas van Aarsen said:
I'd recommend starting with an expression in which the expressions of the form $\lnot x$ have not been expanded yet to $x \operatorname{NAND} x$.
Because that is where $x$ is getting duplicated while in a drawing we only want to see $x$ once. 🤔

So do we consider the expression $[(\neg a\land \neg b) \text{ NAND } (\neg c\land d)]\land (c\land \neg a)$ ?

Or do we expand the $\land$ and get $\left [[(\neg a\land \neg b) \text{ NAND } (\neg c\land d)] \text{ NAND } (c\land \neg a)\right ] \text{ NAND } \left [[(\neg a\land \neg b) \text{ NAND } (\neg c\land d)] \text{ NAND } (c\land \neg a)\right ]$ ?

:unsure:
 
  • #12
mathmari said:
So do we consider the expression $[(\neg a\land \neg b) \text{ NAND } (\neg c\land d)]\land (c\land \neg a)$ ?

Or do we expand the $\land$ and get $\left [[(\neg a\land \neg b) \text{ NAND } (\neg c\land d)] \text{ NAND } (c\land \neg a)\right ] \text{ NAND } \left [[(\neg a\land \neg b) \text{ NAND } (\neg c\land d)] \text{ NAND } (c\land \neg a)\right ]$ ?

:unsure:
How about $\lnot\Big[\big[\lnot(\neg a \text{ NAND } \neg b) \text{ NAND } \lnot(\neg c \text{ NAND } d)\big] \text{ NAND } \big[\lnot(c \text{ NAND } \neg a)\big]\Big]$? 🤔
 
  • #13
Klaas van Aarsen said:
How about $\lnot\Big[\big[\lnot(\neg a \text{ NAND } \neg b) \text{ NAND } \lnot(\neg c \text{ NAND } d)\big] \text{ NAND } \big[\lnot(c \text{ NAND } \neg a)\big]\Big]$? 🤔

So we get:

output_NAND.JPG

Is that correct? Is there an online program that we could draw the above? :unsure:
 
  • #14
mathmari said:
Is that correct? Is there an online program that we could draw the above?
Let's start with $\lnot a\text{ NAND }\lnot b$.
You have a NAND to find $\lnot a$.
Shouldn't you also have a NAND to find $\lnot b$ before combining it with $\lnot a$? 🤔

An online drawing program for circuits with logic ports...
TikZ comes to mind, which has dedicated libraries for logic ports.
I found for instance this overflow article which mentions circuitikz.

We can use the http://35.164.211.156/tikz/tikzlive.html we have on MHB to edit such a picture.
Let's see...
\begin{tikzpicture}
%preamble \usepackage{circuitikz}
%preamble \usepackage{amsmath}
\coordinate[label=left:a] (a) at (0,2);
\coordinate[label=left:b] (b) at (0,0);
\draw (2,2) node[nand port] (nota) {};
\draw (2,0) node[nand port] (notb) {};
\draw (4,1) node[nand port] (nand1) {};
\draw (a) -- (nota.in 1);
\draw (a) -- (nota.in 2);
\draw (b) -- (notb.in 1);
\draw (b) -- (notb.in 2);
\draw (nota.out) -- (nand1.in 1);
\draw (notb.out) -- (nand1.in 2);
\draw (nand1.out) node[above right] {$\lnot a\text{ NAND }\lnot b $};
\end{tikzpicture}
Code:
\begin{tikzpicture}
  %preamble \usepackage{circuitikz}
  %preamble \usepackage{amsmath}
  \coordinate[label=left:a] (a) at (0,2);
  \coordinate[label=left:b] (b) at (0,0);
  \draw (2,2) node[nand port] (nota) {};
  \draw (2,0) node[nand port] (notb) {};
  \draw (4,1) node[nand port] (nand1) {};
  \draw (a) -- (nota.in 1);
  \draw (a) -- (nota.in 2);
  \draw (b) -- (notb.in 1);
  \draw (b) -- (notb.in 2);
  \draw (nota.out) -- (nand1.in 1);
  \draw (notb.out) -- (nand1.in 2);
  \draw (nand1.out) node[above right] {$\lnot a\text{ NAND }\lnot b $};
\end{tikzpicture}
🤔
 
Last edited:
  • #15
Klaas van Aarsen said:
Let's start with $\lnot a\text{ NAND }\lnot b$.
You have a NAND to find $\lnot a$.
Shouldn't you also have a NAND to find $\lnot b$ before combining it with $\lnot a$? 🤔

An online drawing program for circuits with logic ports...
TikZ comes to mind, which has dedicated libraries for logic ports.
I found for instance this overflow article which mentions circuitikz.

We can use the http://35.164.211.156/tikz/tikzlive.html we have on MHB to edit such a picture.

I used the online editor of MHB and I got:

https://www.physicsforums.com/attachments/311767._xfImportIs everything correct? :unsure:

Is it understanadle like that or should I write at each gate the output? :unsure:
 
  • #16
It looks correct to me.
And I could check the circuit based on the expression on the right, so I believe that is good enough. 🤔
 
  • #17
Klaas van Aarsen said:
It looks correct to me.
And I could check the circuit based on the expression on the right, so I believe that is good enough. 🤔

Great! Thanks a lot! 🥳
 

1. What is a NAND-gate?

A NAND-gate is a type of logic gate that performs the logical operation of "NOT AND". It has two or more inputs and one output, and its output is only 0 (low) when all of its inputs are 1 (high).

2. How do you draw a NAND-gate?

To draw a NAND-gate, start by drawing a rectangle with a small notch on the left side. Then, draw a small circle at the top of the rectangle and connect it to the notch with a line. Finally, draw two diagonal lines inside the rectangle, connecting the top and bottom edges to the circle. This represents the inputs and output of the NAND-gate.

3. What is the output of a NAND-gate?

The output of a NAND-gate is only 0 (low) when all of its inputs are 1 (high). In all other cases, the output is 1 (high).

4. How does a NAND-gate work?

A NAND-gate works by using transistors to control the flow of electricity. When all of its inputs are 1 (high), the transistors are turned off and the output is 0 (low). If any of the inputs are 0 (low), the corresponding transistor is turned on and the output is 1 (high).

5. What is the purpose of a NAND-gate?

NAND-gates are commonly used in digital circuits to perform logical operations. They can be used to create more complex logic gates, such as AND, OR, and NOT gates, and are an essential component in the design of computer processors and other electronic devices.

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