- #31
thankz
- 265
- 40
just a suggestion, but why can't you poll the switch with the ardrino and use a small wait state loop to control debounce?
Abnormal low current from JK flip flop IC at toggle mode
Click For Summary
Discussion Overview
The discussion revolves around troubleshooting an issue with a JK flip-flop IC (4027) used in a prototype for a balance indicator in a farm quadbike. The focus is on the low current output when the circuit is activated, affecting the operation of an Arduino and LED strips. Participants explore various aspects of the circuit design, including the use of a momentary push button, the behavior of the flip-flop, and the potential need for additional components like a voltage regulator and a PMOS power FET.
Discussion Character
- Technical explanation
- Debate/contested
- Experimental/applied
Main Points Raised
- Some participants suggest that if both J and K inputs of the flip-flop are at 0V, the output will not change, which could affect the circuit's functionality.
- Concerns are raised about the reliability of the push button as a clock input due to potential switch bounce, with recommendations for hardware debouncing solutions.
- Participants question whether the output current specification of the flip-flop meets the input requirements of the connected loads.
- There is a suggestion to verify the flip-flop's toggling behavior using an LED or oscilloscope to ensure it operates correctly with the button press.
- Some participants indicate that the flip-flop output may not have sufficient drive capability for the connected circuit, suggesting the use of a p-channel power FET for switching power.
- Questions arise regarding the characteristics of PMOS power FETs, including their on-resistance and suitability for logic level control.
- Participants discuss the necessity of additional components, such as resistors and capacitors, in the circuit design to ensure proper operation.
Areas of Agreement / Disagreement
Participants express multiple competing views regarding the circuit design and the appropriate components to use. There is no consensus on the best approach to resolve the low current issue, and various suggestions are made without agreement on a single solution.
Contextual Notes
Limitations include potential misunderstandings of the circuit layout, the need for clearer schematics, and the varying specifications of components discussed, such as the PMOS FETs and their compatibility with different logic levels.
Who May Find This Useful
This discussion may be useful for students and hobbyists working on electronics projects involving flip-flops, power management, and circuit design, particularly in applications requiring reliable switching mechanisms.
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