Boolean circuit electrical engg 2nd year

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Discussion Overview

The discussion revolves around constructing a Boolean circuit based on a given Boolean equation for a lab assignment in electrical engineering. Participants explore the requirements for using specific logic gates, including AND, OR, and NOT gates, as well as the implications of using NAND and NOR gates.

Discussion Character

  • Homework-related
  • Technical explanation
  • Debate/contested

Main Points Raised

  • One participant expresses difficulty in constructing a circuit from the Boolean equation c'd + bd + b'cd' + ab'd, specifically noting the requirement to use only AND and OR gates.
  • Another participant clarifies that inverters are allowed, suggesting that NAND and NOR gates can also be utilized, which may provide additional options for circuit construction.
  • A further comment indicates that while NAND gates can be constructed from AND and NOT gates, the basic set of AND, OR, and NOT gates is sufficient for any logical expression.
  • Another participant notes that historically, many gate arrays were composed solely of one type of gate, implying a potential simplification in circuit design.

Areas of Agreement / Disagreement

Participants generally agree on the sufficiency of AND, OR, and NOT gates for constructing logical expressions, but there is some debate regarding the necessity and utility of NAND and NOR gates in this specific context. The discussion remains unresolved regarding the best approach to take for the circuit construction.

Contextual Notes

The discussion does not resolve the specific requirements for the circuit construction, such as whether the use of NAND or NOR gates is preferable or necessary given the constraints of the assignment.

desidriver
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hi everyone i have a lab due tomorrow and wondering if someone can help me with question b. See attachment. I have done the k graph and got my boolean equation

c'd+bd+b'cd'+ab'd. i just simply can't make the circuit.
i have to use only and or gates.
can someone please help

Not sure if you can view the attachment. if you can't i have uploaded alternate links

http://i46.tinypic.com/wtt7a8.png

http://s9.postimage.org/vwyydvd7z/Sc...1_07_05_PM.png

Thanks
 
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c'd+bd+b'cd'+ab'd. i just simply can't make the circuit.
i have to use only and or gates.

The problem actually says inverters are allowed as well. So you can also use NAND and NOR gates if you wish (eg make a NAND from an AND and an inverter, however you may not actually need a NAND gate).
 
CWatters said:
The problem actually says inverters are allowed as well. So you can also use NAND and NOR gates if you wish (eg make a NAND from an AND and an inverter, however you may not actually need a NAND gate).

Of course, you never need a NAND gate since the three (AND OR NOT) are sufficient for any logical expression. I guess the interesting thing about that is that NAND's and NOR's each by themselves are also sufficient.
 
Indeed. Many early gate arrays were nothing but a sea of one type of gate.
 

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