Decoder and register in Verilog

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The discussion revolves around programming the write action for a register file consisting of 16 instances. The main challenge is developing a decoder that activates the enable signal (enbl) for only one register at a time, allowing data to be written to that specific register. The proposed solution involves creating a decoder module that takes a 4-bit hexadecimal input representing the register number and outputs a 16-bit binary signal (enbl_sig) with a single '1' corresponding to the selected register, while all other bits remain '0'. This enables the correct register to receive the write data. Additionally, there is a request for clarification on the "Received Register Number" to ensure proper understanding of the implementation. The suggestion that the setup resembles a demultiplexer is also noted, indicating a potential alternative approach to the problem.
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I'm trying to program the write action for a register file.
Basically I have 16 instances of a register file whose inputs are:

enbl - the enable signal
write_data - data to be written to register
clk - clock

and a single output, out, which is the value of the register.

The problem I'm having is developing a decoder that will set the enbl signal of only a single register to 1 for writing to the register so only 1 register will be written at any given time. All 16 registers will be of the same register module. I am thinking of creating a decoder module that receives the number of the register to be written, and then outputs a 16-bit binary number (called enbl_sig) that will be all 0's except for a single 1 in which the digit place corresponds to the register number to be written. Therefore I can just send enbl[0], enbl[1]... etc to each register instance. The register instance with enbl[.]=1 will be the one that will write the data to the register. Also, the received register number to write to will be received is a 4-bit hexadecimal number.

Sorry if this sounds confusing, but I don't know how else I would be able to do it. Does anyone have any suggestions or perhaps an easier method to accomplish this? I don't need the exact code, just the method of taking a 4-bit hexadecimal number and then outputting the desired 16-bit binary number. Thanks again.
 
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ACLerok said:
The problem I'm having is developing a decoder that will set the enbl signal of only a single register to 1 for writing to the register so only 1 register will be written at any given time. All 16 registers will be of the same register module. I am thinking of creating a decoder module that receives the number of the register to be written, and then outputs a 16-bit binary number (called enbl_sig) that will be all 0's except for a single 1 in which the digit place corresponds to the register number to be written. Therefore I can just send enbl[0], enbl[1]... etc to each register instance. The register instance with enbl[.]=1 will be the one that will write the data to the register. Also, the received register number to write to will be received is a 4-bit hexadecimal number.

It looks to me that what you are attempting to build is actually a demultiplexor.

I was following what you said until

The register instance with enbl[.]=1 will be the one that will write the data to the register. Also, the received register number to write to will be received is a 4-bit hexadecimal number.

I am having the most trouble here in terms of understanding what you want to do. Can you clarify a little bit regarding your "Received Register Number"?
 
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