Design a Moore type synchronous state machine with only two

[trickae]

Homework Statement

(Problem 226) Design a Moore type synchronous state machine with only two
states, two external inputs X1 and X2, and one output Z. When X1 X2 = 1 at the
next clock timing event, output Z goes to 1. Output Z then goes to 0 unless X2 = 1
causing the output to stay at 1. Use positive edge-triggered JK
flip-flops in your
design.

Homework Equations

The Attempt at a Solution

would like tips on how to even begin an attempt
currently reading wakerly chapter 7 to cover the basis of the problem

 

[berkeman]

What does a Moore machine look like. Show us your state transition diagram, and we can help if you still are confused.

 

[trickae]

I posted the digital design problems and I actually have solved two out of the three of them.

My major question was with :

(Problem 226) Design a Moore type synchronous state machine with only two
states, two external inputs X1 and X2, and one output Z. When X1 X2 = 1 at the next clock timing event, output Z goes to 1. Output Z then goes to 0 unless X2 = 1 causing the output to stay at 1. Use positive edge-triggered JK flip-flops in your design.

In the lecture notes we're taught how to design an FSM with one input and depending on the output equation if it includes the external input - then we decide whether its a mealy or a moore machine.

However here we have two external inputs - I'm having trouble coming up with the truth table -

a 1 input truth table may look like this:

         | x = 0  x = 1 | (OUTPUT)
states |  Q1Q0     Q1Q0|   Z1  Z2
A...A ...B...|1    1
B...B ...C...|1    0
C...C ...D...|1    1
D...D ...A...|0    0

where 
A = 00
B = 01
C = 10
D = 11

my problem is i don't know how to structure the truth table nor the state diagram with two inputs.

All i know is that
1) its a moore model
i.e. the output equation is only a function of its present state and not the input

q = f(q,x) state equation
z = h(q) output equation

where

x = external input
q = present state

2) I know how to design the problem once i get the logic table or state diagram.

3) the only time the output is z = 1
is when

X1' . X2 = 1

how would we describe that?

would that be like ...

         | X1 = 0  X1 = 1 |  X2 = 0   X2 = 1
states   |  Q1Q0      Q1Q0| Q1Q0     Q1Q0  
A...A ...B... |...ETC ETC..
B...B ...C...|
C...C ...D...|
D...D ...A...|

then how would we show both X1'X2 = 1 ?

we would have a feedback design with these extra inputs asserted.

or ...

        |X1X2 = 00  X1X2=01   X1X2=10    X1X2 = 11|
states|Q2.Q1.Q0  Q2.Q1.Q0   Q2.Q1.Q0   Q2.Q1.Q0| OUTPUTS  
................
.................
.................
.................
.................

then using the J/K flip flop excitation table - which is

Q = Jq' +K'q

q Q | J K
0 0 | 0x
0 1 | 1x
1 0 | x1
1 1 | x0

lol I'm very lost. Please help

 

[berkeman]

Have you learned how to draw the state transition diagram? Draw the states as circles, and the transitions from state to state depend on the two inputs (and which state you are in, obviously). The outputs depend only on the state you are in, as you said.

 

[trickae]

I've learned how to draw state diagrams but should we tackle this question from the timing diagram first?

Edit: I think i may have the state diagram
I'll draw the state diagram up on paint just one second

 

[trickae]

Sorry ... i don't know what i was thinking with the above post

http://img255.imageshack.us/img255/3979/nowwaitasecgt7.jpg

 

[berkeman]

The diagram is a mix of Mealy and Moore styles. Remember, the output is determined only by the state in a Moore machine, so you don't label the transitions with an output:

http://en.wikipedia.org/wiki/State_diagram

 

[trickae]

so in this case - would it be safe to say that
states are
A = 0
B = 1

would it then look like this?
http://img103.imageshack.us/img103/1264/nowwaitasecuq3.jpg

 

[berkeman]

That better. I'm still a bit confused by your statement of the problem, though:

When X1 X2 = 1 at the
next clock timing event, output Z goes to 1. Output Z then goes to 0 unless X2 = 1
causing the output to stay at 1.

X1 X2 = 1 ? X1 X2 is a 2-bit binary number. Do you mean X1 X2 = 01 ?

 

[trickae]

sorry i still don't know how to implement this with two inputs - wouldn't that mean that our states would have arrows dependent on 8 combinations of arrows?

 

[trickae]

That better. I'm still a bit confused by your statement of the problem, though:
X1 X2 = 1 ? X1 X2 is a 2-bit binary number. Do you mean X1 X2 = 01 ?

this is what the question says

When X1' X2 = 1 at the next timing event, output Z goes to 1. Output Z then goes to 0 unless X2 = 1 causing the output to stay at 1.

actually to be quite honest i don't know if the professor meant x1 and x2 or if both x1 and x2 = 1 ... i think they may be the same thing lol.

I think the professor might have and'ed both x1' x2 so that its only asserted high when x1 = 0 and x2 = 1.

Its a guess - let me check out the student help forum on our webct. Just a sec

 

[trickae]

fraid not. The help section is riddled with "How do I draw a timing diagram" like questions. The professor didn't state anything else. I think it has to be :
__
X1 = 1
X2 = 1

then we have like a latching effect, as long as x2 is 1 the state doesn't change unless x2 changes.

thanks for your help thus far

 

[berkeman]

Once you have the state transition diagram, you can put it into tabular form something like this:

Present State (with output), Inputs, Next State. Kind of like in this tutorial:

http://www.mee.tcd.ie/~flooddk/2e6/Tutorial4Solutions.pdf

Can you take a cut at writing this table out?

 

[trickae]

initial state final state
         X2 = 1               z
q2 q1 q0      Q2  Q1   Q0
0   0   1     1   1    1       1
0   1   0     1   1    1       1
0   1   1     1   1    1       1
1   0   0       ETC
1   0   1
1   1   0
1   1   1

         X2 = 0                   z
q2 q1 q0       Q2   Q1 Q0
0   0   1      0    0   0        0
0   1   0      0    0   0        0
0   1   1         ETC
1   0   0
1   0   1
1   1   0
1   1   1

WHEN X2 = 1 are all values asserted positive? if its a moore model than the values of x shouldn't matter when determining z.

what do we fill in for the next state since no sequence is given

I've done these problems when designing a a ckt from a sequence or a state diagram but not where there's two inputs such as x1,x2 - does that mean i need four columns for

q2 q1 q0 | Q1 Q2 Q0

?

 

[berkeman]

fraid not. The help section is riddled with "How do I draw a timing diagram" like questions. The professor didn't state anything else. I think it has to be :
__
X1 = 1
X2 = 1

then we have like a latching effect, as long as x2 is 1 the state doesn't change unless x2 changes.

I think that your interpretation is probably correct here. You can draw the 2-state transition diagram based on this interpretation. And then the implementation is fairly easy I think. You just need to design the combinatorial logic that feeds X1 and X2 into a JK flip-flop, and results in the two outputs shown in your diagram.

 

[trickae]

http://img444.imageshack.us/img444/9992/l1as3.jpg
http://img248.imageshack.us/img248/8650/l2eq8.jpg

is the example we have - as you can see we have two mini tables for one input x - so does that mean we need 4 mini tables for 2 inputs x. Also what goes in for our Q state? i know we calculate it using J/K equations but since we have only two states does that mean we have a 2 x 4 row table?

or

   x1x2 = 00    x1x2 = 01  x1x2 = 01     x1x2 = 01
   q2q1q0       q2q1q0      q2q1q0        q2q1q0      
------------------------------------------------
A|
B|

do we design a latch like circuit such that the circuit continues only when x2 = 1, or asserted? Then workout the J/k equations for our intial states q2q1q0 ?

ALso with the above table idea we don't know the combinations we need for the output. Only that

q Q | J  K 
0 0    0x
0 1    1x
1 0    x1 
1 1    x0

yet we don;t have a pattern for the final inout - I'm lost.

 

[trickae]

berkman i think i got the truth table

for states 
A=0
B=1



[PLAIN]http://img248.imageshack.us/img248/6757/truthtablevk1.jpg[/PLAIN]

 

[trickae]

http://img403.imageshack.us/img403/2043/kmapqr5.jpg

 

[trickae]

http://img69.imageshack.us/img69/5765/jkeqnshe9.jpg

lol i can get the ckt diagram from this alone now.

Thanks a tonne for the push in the right direction. I guess I was sleep deprived last night and couldn't think straight. Thanks a lot for your help.

 

[berkeman]

Good job!

 

[trickae]

sorry to btoher you again berkman but I got a 3.75/5 for the question. Lol but here's the solution:

http://img510.imageshack.us/img510/4678/hw2q3solef5.jpg

i didn't quite understand how we ended up with those equations at the end. Any help?