Estimate noise improvement as a funtion of sampling rate

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SUMMARY

This discussion focuses on estimating noise improvement as a function of sampling rate in experimental data involving electrode measurements. The Nyquist Sampling Theorem is highlighted as a critical concept, indicating that sampling noise increases with lower sampling frequencies. The conversation emphasizes the use of an Analog-to-Digital Converter (ADC) and the Whittaker–Shannon interpolation formula to analyze signal-to-noise ratios at varying sampling rates. Participants conclude that oversampling can lead to a potential 3dB improvement in noise performance when the sampling frequency is doubled.

PREREQUISITES
  • Understanding of the Nyquist Sampling Theorem
  • Familiarity with Analog-to-Digital Converters (ADC)
  • Knowledge of signal integration techniques
  • Basic grasp of the Whittaker–Shannon interpolation formula
NEXT STEPS
  • Research the mathematical implications of the Nyquist Sampling Theorem
  • Explore the design and functionality of integrating ADCs
  • Study the Whittaker–Shannon interpolation formula in detail
  • Investigate the effects of oversampling on signal-to-noise ratios
USEFUL FOR

Researchers and engineers working with signal processing, particularly those involved in electrode measurements and noise analysis in experimental setups.

TryingTo
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Hi all,

I would like to estimate from my experimental data what would be the noise of the signal if I could sample at a higher rate. It is possible to do that? Do you have any references to good books that explain this topic?

Thank you!
 
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I assume that you are familiar with the Nyquist Sampling Theorum. There, sampling noise is increased as sampling frequency decreases.

If that's not what you mean, then please explain your question better.
 
Hi, thanks for your reply. I'll explain better.

I bias several electrodes with an AC voltage and measure the current at each of them. I don't monitor the current in real time, I integrate the current of 1 electrode during several cycles N and later measure the average current dividing by N. I can't do this for all the electrodes simultaneously so after I've done this for electrode 1 I move to electrode 2, and so on. Because I have to scan all the electrodes the sampling rate for 1 electrode is affected, and is lower than if I could scan only one electrode. I could implement experimentally that only a single electrode is measured but this is quite complicated so I want to study if it is worth it. Basically I want to do some analysis to the current experimental trace of electrode 1 and estimate (if it is possible): if my sampling rate would have been X times faster than the original value, what would be the new trace noise or signal to noise ratio?

Thanks again.
 
It sounds like a perfect application for an integrating DAC, where the signal is integrated on the analog side before sampling. Is that what you are using?

Edit: I meant to say ADC, not DAC. Analog-digital-converter.
 
Yes, I integrate before sampling, why?
 
OK, your integrator is a low pass filter, with a known slope. Given that, the anti-ailiasing math in the Wikipedia Nyquist Sampling article linked gives you the tools you need to calculate signal-to-noise ratio as a function of sampling frequency. I must be missing something, what more do you need?
 
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I think I was mising something..What I understand now is that the Whittaker–Shannon interpolation formula will give me the expression I need, changing T I can see the effect of the frequency sample. Am I right?
 
I think you got it. Good luck.
 
Thanks a lot! You've been very helpful!
 
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I seem to remember that the quantisation noise is the same power for all sample rates (defined by quantising size) When you sample at a higher frequency, this power is spread over a bigger frequency range and, because you are oversampling, you can safely LP filter to get rid of the HF components, so that the only quantising noise that will emerge will be that which is in the baseband bandwidth. Iirc, it means a possible 3dB improvement for doubling the sampling frequency.
I'm sure that a Google search with these terms in it will produce something that works for your particular level. I know that single bit ADCs (bit slice) can have excellent noise performance (once you've dealt with some very high speed circuitry problems.
 

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