The discussion revolves around determining the time constant for an RC circuit involving a capacitor and resistors. Participants are examining the implications of the circuit configuration when a switch is closed.
Participants are exploring the relationship between the circuit components and the resulting time constant. Some have suggested that the time constant may be zero based on the ideal conditions of the voltage source and negligible resistance in the wires. There is an ongoing examination of the assumptions made regarding the circuit setup.
There is a mention of an attached diagram that may provide additional context, but its contents are not described in the discussion. The original poster's calculation appears to conflict with the expected outcome, prompting further inquiry into the assumptions about the circuit configuration.
gneill said:
utkarshakash said:
gneill said:
