How to Cascade Two Sets of 4-bit JK Flip-Flop Counters?

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SUMMARY

This discussion focuses on cascading two sets of 4-bit JK flip-flop counters to create an up-down counter that counts from 0 to 99. The first set of JK flip-flops operates as a BCD counter, providing outputs that trigger the second set after every 10 counts. Participants suggest using the 74LS192 or 4510 chips for counting up and down, while the 4518 and 40110 chips are recommended for counting up only. The output from the fourth JK counter can be utilized to clock the second set, with the option to invert the pulse if a rising edge is required.

PREREQUISITES
  • Understanding of JK flip-flop operation
  • Knowledge of BCD (Binary-Coded Decimal) counting
  • Familiarity with 74LS192 and 4510 integrated circuits
  • Basic circuit design principles for cascading counters
NEXT STEPS
  • Research the operation and applications of the 74LS192 and 4510 chips
  • Study BCD counter design and implementation techniques
  • Learn about cascading flip-flops and their triggering mechanisms
  • Explore K-mapping for designing custom counters
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Electronics enthusiasts, circuit designers, and students looking to implement cascading JK flip-flop counters in digital circuits.

KAS90
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hi there...
I wanted to ask about a way to cascade or let's say connect two sets of 4-bit flipflop JK counters together..
I want to create a circuit that is an up-down counter from 0 to 99..but as it is known, its difficult to use 8 inputs ofcourse.. so the best way is to have two sets of 4 jk flipflops..the first set will be connected to a 7seg and will count up and down, while the other one will not count up or down unless the first one has finished 10 counts..I hope u get what I mean..
the problem is that I didnt know how to connect the first circuit with the other one, in order for the first one to trigger the second one..do u guys have any idea how can I apply this? thanks a looot in advance :)
 
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The output of the 4th JK counter (X3 in the diagram below) falls when it clocks over from 9 to 0.
You can use this falling pulse to clock the next set of flip flops. You could invert it if the counter needed a rising edge.

You would wire the 1st 4 JKs as a BCD counter so that it divided by 10 but gave outputs from each stage as powers of 2.
So the 1st stage would give a 0 or a 1 and this would be worth 0 or 1.
But if the next stage gives a 1 it is worth 2. The next stage's 1 is worth 4 and the last one is worth 8.

So, 1 0 0 1 is worth 9.
Note the values from 10 to 15 cannot occur as this is a BCD counter.


deccount.gif


This would only count up as shown.


However, to do what you want, you could just get a 74LS192 chip or the 4510 which can count up or down, and already give BCD out.

If counting down wasn't important, you could get a 4518 which already has two BCD counters in the one chip, or the 40110 which already has 7 segment drivers in the counter chip. These only count up though.
 

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You can easily design any such counter using the K-mapping tutorial given in the instruction section of this site.

KM
 
Thanx guys that was a lot of help :) I really appreciate it..
but now I am having a problem connecting the two IC's.. I hope I figure it out..
 
Most likely this can only be answered by an "old timer". I am making measurements on an uA709 op amp (metal can). I would like to calculate the frequency rolloff curves (I can measure them). I assume the compensation is via the miller effect. To do the calculations I would need to know the gain of the transistors and the effective resistance seen at the compensation terminals, not including the values I put there. Anyone know those values?

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