How to Convert a 3-Input AND Gate to NAND Gates?

[rjs123]

Homework Statement

I'm trying to convert the 3-input AND gate shown below using only NAND gates...but am having troubles. Is it possible to use only 2 NANDS for the conversion?


http://www.doctronics.co.uk/images/4081_03.gif

 

[LCKurtz]

What about a 3 input NAND followed by a two input NAND used as an inverter?

 

[rjs123]

I'm trying to convert this expression: ga + za + sgz

using just 2-input nand gates...more specifically the 7400 ic chip.

I'm trying to use as little NAND gates as possible. I've got (ga + za) down to 5 NAND gates currently...I can only use 8 total NANDS for this.

 

[LCKurtz]

I'm trying to convert this expression: ga + za + sgz

using just 2-input nand gates...more specifically the 7400 ic chip.

I'm trying to use as little NAND gates as possible. I've got (ga + za) down to 5 NAND gates currently...I can only use 8 total NANDS for this.

I can do that expression with six 2-input NANDs. I don't see how to show you how without showing the solution. Is this a homework problem to hand in?

 

[rjs123]

I can do that expression with six 2-input NANDs. I don't see how to show you how without showing the solution. Is this a homework problem to hand in?

Here is what I got...this is a practice problem to prepare for a midterm, but I would like to see how you used 6 NAND gates.

http://img827.imageshack.us/img827/7766/schematic.jpg

 

[LCKurtz]

Here is what I got...this is a practice problem to prepare for a midterm, but I would like to see how you used 6 NAND gates.

OK. Here's my circuit. One NAND is used as an inverter.

 

[rjs123]

OK. Here's my circuit. One NAND is used as an inverter.

thank you. I have one more expression for practice problems:

ab~ce + b~cde + cde + abc + acd~e (The ~ symbol represent "not")

I'm supposed to do this expression in 12 gates.

I currently have the last 3 condensed to: c(de + ab + ad~e)

The first two: b~ce(a + d)

so the final condensed form looks like this: b~ce(a + d) + c(de + ab + ad~e)

if you can try helping me convert this expression into a NAND diagram that would be great...thanks for your help again.

 

[NascentOxygen]

You have written ab&ce

Is this any different from a&b&c&e ?

 

[rjs123]

You have written ab&ce

Is this any different from a&b&c&e ?

I changed the above post...it should be tilde symbols ~ for "not".

 

[LCKurtz]

But in the expression ab~cd is it the b or the c that is the not? You can make the expressions much more readable with tex, like this: $ab\bar cd$. Here's how you enter it:

##ab \bar cd##

 

[NascentOxygen]

I currently have the last 3 condensed to: c(de + ab + ad~e)

Consider de + ad¬e
Take out the term d,
d (e + a¬e)

when e is TRUE, the bracketed expression = e
when e is FALSE, the bracketed expression evaluates = a

So,
d (e + a¬e) = d (e + a) = de + da

So c(de + ab + ad~e) = c (de + ab + ad) = c( d(e+a) + ab)

In the absence of better advice, I would implement paired terms, e.g.,
I would form E+A
then AND it with D
then form AB
then OR these two terms (using NAND gates)
then AND with C
then ...

This seems rather pedestrian, hopefully someone else has a better idea.

 

[NascentOxygen]

duplicate

 

[rjs123]

original form: $ab \bar ce$ + $b \bar cde$ + $cde$ + $abc$ + $acd \bar e$

condensed form: $b \bar c(ae + de)$ + $c(de + ab + ad \bar e)$

partial circuit diagram using NANDS $c(de + ab + ad \bar e)$:

I made that portion with 7 NANDS...I still have to finish the $b \bar c(ae + de)$ portion of the diagram...still have 5 NANDS left.

 

[rjs123]

i figured it out thanks to oxygen's logic...I checked all 32 combinations for all the letters related to the problem...and all of the outputs came out correct.

final condensed form: c(de + da + ab) + b(ae + de)

heres my diagram:

 

[NascentOxygen]

i figured it out

Good.

http://s16.postimage.org/mb1ot390j/tit.jpg

final condensed form: c(de + da + ab) + b(ae + de)

I think you unnecessarily duplicated D NAND E
when you could have used the output twice?