Logic Circuit Conversion Homework: NAND-NOR to AND-OR and Back to NAND-NOR

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Discussion Overview

The discussion revolves around a homework problem involving the conversion of a NAND-NOR circuit to an AND-OR circuit and then back to a NAND-NOR circuit. The focus is on the correctness and simplicity of the proposed solutions.

Discussion Character

  • Homework-related

Main Points Raised

  • One participant presents their solution in two parts, claiming to have achieved the simplest AND-OR circuit with an AND output and a corresponding NOR output in the second part.
  • Another participant expresses general approval of the solution, indicating it seems acceptable.
  • A third participant suggests a modification regarding the placement of NOT gates in the final diagram, noting it does not affect the circuit's functionality.
  • A later reply identifies a potential mischaracterization of a circuit component as an XOR, implying a need for clarification on the circuit's configuration.

Areas of Agreement / Disagreement

Participants generally express approval of the initial solution, but there are suggestions for modifications and clarifications, indicating some level of disagreement or uncertainty regarding specific aspects of the circuit design.

Contextual Notes

There is uncertainty about whether the second part of the solution is as simple as possible, and the identification of the upper left combination as an XOR suggests potential misinterpretation of circuit components.

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Homework Statement



1. Convert the following NAND-NOR circuit to simplest AND-OR circuit (bubbles allowed) such that the output gate is an AND. Then, convert the resulting circuit back into a NAND-NOR circuit (no bubbles) such that the output gate is a NOR.

Screen Shot 2015-02-15 at 11.44.50 AM.png


Homework Equations

The Attempt at a Solution



My solution is drawn in two parts, part a) and b).

For part a) I believe I got the simplest AND-OR circuit possible with an AND gate output.

For part b) I am unsure if the circuit is as simple as possible, but I managed to get a NOR output.

My work is shown below:

IMG_0526.jpg


Do these look okay?

Thank you.
 
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Zondrina said:
Do these look okay?
Seems OK.
 
Looks right.
For clarification, I would swap the two NOT for A and B in the last diagram (so the upper gate keeps the same meaning as before), but that does not change how the circuit works.
 
For that matter, the upper left combination is an XOR:
upload_2015-2-15_18-41-9.png
 

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