Mod-11 Ripple Counter Homework: Solve Error w/T Flip-Flops

[Bryan52803]

Homework Statement

Create a mod-11 ripple counter using Flip flops and standard logic gates. Only usable flipflops are T,D, and JK. I've used T.

Homework Equations

Using Quartus II simulation software

The Attempt at a Solution

I have the block diagram all done and the simulation. Everything works fine. Except! When the 4 bits get to decimal 11(when its supposed to reset back to 0), it does with every T-flip flop except the third bit. So the decimal when it "resets" is equal to 4, not zero. It actually changes the third bit from 0, to 1 prematurely. I've attached the block diagram and the simulation waveform file with the error pointed out. Any help or hints would be greatly appreciated! Maybe I'm misunderstanding how the reset input works, but unfortunately I have a very poor teacher and the class is usually left to fend for itself in terms of teaching and clarification.

Bryan

 

[DaveE]

This is why nobody wants to use ripple counters, they're awful!
There's nothing wrong with your circuit, you can see that with symmetry; you have a problem with bit 3 which should be the same as bit 2 etc. I think the problem is a race condition because the reset pulse is too short, When bit 2 resets it puts a clock pulse into bit 3 which toggles it. Since 11_dec = 1011_bin, bit 3 switches from 0→1, all of the other bits would switch from 1→0, which you wouldn't notice.
You could try adding another FF in the reset path to hold that signal for 1/2 clock period. But the reset must go away before the next clock input.