# MOSFET inverter that satisfies a given static discipline

1. Jun 26, 2013

### pc2-brazil

1. The problem statement, all variables and given/known data

Consider a family of logic gates that operate under the static discipline with the following voltage thresholds: VOL = 0.5 V, VIL = 1 V, VOH = 4.5 V, and VIH = 4 V. Using the switch-resistor MOSFET model, design an inverter satisfying the static discipline for the four voltage thresholds using an n-channel MOSFET and a resistor. The resistance per square of the MOSFET in its ON state is Rn = 1 kΩ and VT (the threshold voltage) = 1.8 V. Recall, RON = Rn(L/W). Assume VS (the output of the inverter with high output) = 5 V and Rsquare (resistance per square) for a resistor is 500 Ω. Further assume that the area of the inverter is given by the sum of the areas of the MOSFET and the resistor. Assume that the area of a device of length L and width W is LW. The inverter should take as little area as possible with minimum size for L or W being 0.5 μm. Graph the input-output transfer function of the inverter. What is the total area of the inverter? What is its maximum static power dissipation?

2. Relevant equations

3. The attempt at a solution

The MOSFET inverter is shown in the attached figure.

The inverted has two parts: a resistor and a MOSFET. The length and width of the resistor are $L_R$ and $W_R$, respectively, and its resistance is RL = Rsquare(LR/WR), where Rsquare is the resistance per square of the resistor. Similarly, the length and width of the MOSFET are L and W, and its resistance when ON is RON = Rn(L/W), where Rn is the resistance per square of the MOSFET.

For the inverter to obey the given static discipline, the condition is that the output produced for logical zero must be at most VOL (which is the highest output value allowed for logical zero by the static discipline). The output value for logical zero in the inverter occurs when the MOSFET is ON. When it is ON, its resistance is given by RON, and the output voltage is the voltage across RON, as can be seen in the attached figure; thus, the low output voltage for this inverter is given by $\dfrac{R_{ON}V_S}{R_L + R_{ON}}$. So, the condition that must be met is that:

$$\dfrac{R_{ON}V_S}{R_L + R_{ON}} \leq V_{OL}$$

By the expression above, the relation between RON and RL is:

$$R_{ON} \leq \dfrac{V_{OL}R_L}{V_S - V_{OL}}$$

Substituting RON = Rn(L/W) and RL = Rsquare(LR/WR):

$$R_n\frac{L}{W} \leq \dfrac{V_{OL}R_{square}\frac{L_R}{W_R}}{V_S - V_{OL}}$$

Plugging in the values:

$$1000\frac{L}{W} \leq \dfrac{0.5\times 500\frac{L_R}{W_R}}{5 - 0.5}$$

From the above expression, it can be concluded that the condition that must be met by the two ratios, which I will call condition (1), is:

$$\dfrac{L_R}{W_R} \geq 18\dfrac{L}{W} \ \rm (1)$$

The total area of the inverter is:

A = LW + LRWR

According to the problem statement, if I understood it correctly, the minimum size for L, W, LR and WR is 0.5 μm; so, all these measures must be at least 0.5 μm. I will call this condition (2).

However, I'm not sure how to use conditions (1) and (2) to minimize the total area of the inverter (A).

Any suggestions?

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Last edited: Jun 26, 2013
2. Jun 27, 2013

### CWatters

You have two equations. Sounds to me like you need to make a substitution to eliminate the parameters of one device (eg the resistor). Then you should have an equation for A in terms of the aspect ratio of the other device (eg the FET). Then find where the curve is a minimum (differentiate and equate to zero?).

That will give you the aspect ratio for one device. The area of that device will be a minimum when the smallest dimension is equal to 0.5um. Should then be able to solve for all the other parameters.

I haven't tried it.