Passive probing of JTAG programming of a uC

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Discussion Overview

The discussion revolves around troubleshooting issues related to JTAG programming of a microcontroller (uC) in a test fixture. Participants explore methods for passive monitoring of the JTAG programming stream to identify discrepancies between functioning and non-functioning versions of the PCBA. The conversation includes technical details about the specific hardware involved and potential causes for programming failures.

Discussion Character

  • Technical explanation
  • Debate/contested
  • Experimental/applied

Main Points Raised

  • One participant notes that programming works with an older version of the PCBA but fails with a new version, despite no expected changes to the JTAG connections or circuitry.
  • Another participant questions whether the programming fails consistently and suggests checking the PCB artwork for unintended changes, citing past issues with decoupling capacitors affecting programming.
  • A different participant mentions successful programming at their desk but failure in the manufacturing test fixture, suspecting a misalignment of pogo pins despite visual checks showing good connections.
  • Participants reference TI's documentation on debugging JTAG connectivity problems, specifically regarding invalid device IDs.
  • One participant shares their experience using a Saleae logic analyzer, highlighting its software capabilities and ease of adding protocols for JTAG monitoring.

Areas of Agreement / Disagreement

Participants express differing experiences with programming success, with some able to program the new devices while others face failures. There is no consensus on the root cause of the issues, and multiple potential explanations are proposed.

Contextual Notes

Participants mention specific hardware and software tools, as well as potential issues with PCB design and component placement, but do not resolve the underlying causes of the programming failures.

berkeman
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I'm working on an old test fixture that uses JTAG to program a microcontroller (uC) and its Flash memory chip on production PC Board Assemblies. The programming works fine with an old version of the PCBAs, but for some reason it is failing with a new version of the PCBA that should have had no changes to the JTAG connections, uC or Flash memory chip circuitry.

I'd like to passively monitor the JTAG programming stream to compare the passing and failing datastreams. Does anybody know a good tool or Pod or other way to do this? I've used an old HP logic analyzer in the past to do such probing for short datastreams, but the serial-to-parallel conversion is a bit of a pain for a vanilla tool without some formatting capability.

The JTAG programming Pod I'm using is the TI MSP-FETU430IF (and the Gang programming equivalent), and the uC is the TI MSP430F5437A with external serial Flash memory. I do have a TotalPhase Beagle SCI/SPI Serial Analyzer Pod available, if there is some way to adapt it to JTAG...

Thanks for any ideas.

https://msharmavikram.files.wordpress.com/2012/03/msp-fet430uif.jpg
msp-fet430uif.jpg
 
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berkeman said:
The programming works fine with an old version of the PCBAs, but for some reason it is failing with a new version of the PCBA that should have had no changes to the JTAG connections, uC or Flash memory chip circuitry.

Does it fail all attempts to program them? If so I'd want someone to check the PCB artwork for unintended changes in those areas.

In the distant past I've had issues with changes to decoupling capacitors affecting programming.
 
I am able to program the new devices just fine at my desk using my TI programming Pod. But the programming fails in the Mfg Test Fixture with an error complaining that the device uC JTAG ID is wrong (which I know is not true from my testing at my desk). I suspect some tiny misalignment of the pogo pins in the fixture and the new layout, but visually the connections look good.
 
I've used a Saleae for this. Their software is amazing. They have a bunch of protocols already but it is very easy to add your own as well.

https://support.saleae.com/hc/en-us/articles/208666936-Joint-Test-Action-Group-JTAG-
https://support.saleae.com/hc/en-us/sections/201990583-Supported-Protocols
https://www.saleae.com
 
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