PVD sputtering - step coverage

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SUMMARY

The discussion focuses on the challenges of achieving step coverage when depositing a 100nm titanium film via PVD sputtering on an epoxy-encapsulated IC chip measuring 6mm x 6mm x 2mm. The sputtering process is conducted at a working pressure of approximately 1E-4 mbar with a titanium target of 100mm diameter positioned directly above the chip. Participants concluded that due to the directional nature of sputtering, sidewall coverage is likely to be poor unless a planetary drive sample holder is utilized, which could improve the deposition uniformity.

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  • Understanding of PVD sputtering techniques
  • Knowledge of thin film deposition processes
  • Familiarity with step coverage concepts in semiconductor manufacturing
  • Experience with planetary drive sample holders and their applications
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  • Research the impact of target-to-sample distance on film deposition in PVD sputtering
  • Explore the use of planetary drive sample holders for improved step coverage
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This discussion is beneficial for materials scientists, semiconductor engineers, and professionals involved in thin film deposition and surface engineering, particularly those working with PVD sputtering techniques.

sabine_
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Hi all,

I would like to deposit a thin titanium film (d=100nm) with pvd sputtering on an epoxy encapsulated
IC-chip to protect the chip against corrosive gases.
Titanium target (diameter: 100mm) is straight above IC-Chip (length and width: 6mm, height:2mm), working pressure ~ 1E-4 mbar.
My question is:
What film thickness can I expect at the sidewall (height dimension) of the chip ?
perfect step coverage: ~100 nm or bad step coverage: ~ 0 nm ?

Thanks
Best regards

Sabbi
 
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I guess it depends on the distance from the sputter head to the sample. In general sputtering is quite directional so I’d expect very poor coverage on the sidewalls, unless you’re using a planetary drive sample holder.
 

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