Why is Floating Input High in TTL Logic Circuits

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In TTL logic circuits, floating inputs are considered HIGH because they are connected to the base of an NPN transistor, which is pulled up to Vcc (typically 5V) by an internal resistor. When the input is grounded, the transistor turns on; conversely, a floating input or a direct connection to Vcc turns the transistor off. This design allows TTL inputs to handle floating states without the issues seen in CMOS technology, where floating inputs can lead to unpredictable behavior. The low resistance of TTL inputs mitigates the risks associated with floating states. Understanding this behavior is essential for working with TTL logic circuits effectively.
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Why floating input is considered as HIGH in TTL based logic ckts ?
 
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Long long ago, a TTL input (for a simple example the 7400) was the emitter of an NPN transistor.

The base of said transistor was pulled up to Vcc (typically 5V in those days) by a resistor inside the chip.

Grounding the input connected the emitter to 0V and turned the transistor on.

Leaving the input floating or connecting it to 5V (usually via a resistor) turned the transistor off.

You can find the schematic of a TTL gate in old datasheets.

Since the input was relatively low resistance, there were none of the problems of CMOS inputs where allowing the input to float is a definite no no...
 
I am trying to understand how transferring electric from the powerplant to my house is more effective using high voltage. The suggested explanation that the current is equal to the power supply divided by the voltage, and hence higher voltage leads to lower current and as a result to a lower power loss on the conductives is very confusing me. I know that the current is determined by the voltage and the resistance, and not by a power capability - which defines a limit to the allowable...

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