Discussion Overview
The discussion centers around issues encountered when programming an FPGA with a POF file, specifically contrasting its functionality with that of a working SOF file. Participants explore the potential reasons for the discrepancy in performance.
Discussion Character
- Technical explanation
- Debate/contested
Main Points Raised
- One participant reports that the FPGA works correctly when programmed with a SOF file but fails to operate as expected with a POF file, despite successful programming.
- Another participant inquires about the target board being used, whether it is a proven developer's kit or a new design, and the participant's experience level with FPGA projects.
- Questions are raised regarding the programming method, specifically if JTAG is being used.
- A link to a related discussion on the Intel FPGA forum is provided for further reference on the differences between SOF and POF files.
Areas of Agreement / Disagreement
Participants have not reached a consensus on the cause of the issue, and multiple viewpoints regarding the programming method and board design remain. The discussion is unresolved.
Contextual Notes
There are missing details regarding the specific FPGA model, the nature of the logic being implemented, and any additional configurations that may affect the programming outcome.