Recent content by polaris90

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    Plotting an Exponential Fourier Series

    I'm having some problem in determining the phase of an exponential Fourier series. I know how to determine the coefficient which in turn gives me the series after I multiply by e^-(jωt) I can determine the amplitude by dividing the coefficient by 2 |Dn| = Cn/2 Now my question is how to...
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    Understanding Units: Multiply vs Divide

    Good point, I guess it might be because I cannot simply visualize it in my head as easily as a m^2.
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    Understanding Units: Multiply vs Divide

    No, as I already mentioned above in the text you quoted. My question is when you have two different units such as Newton Meters, which according to my reading is equal to the amount of force of one Newton applied to an arm perpendicularly which is one meter long. I understand how to work with...
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    Understanding Units: Multiply vs Divide

    @flatmaster The only one with a reasonable answer, that helps understand it. I did some reading an you were correct about it. However, I my question was more general and used the Weber as an example. It is clearly understood when you have units such as meters per second, which means a change of...
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    Understanding Units: Multiply vs Divide

    What does it mean to have units being multiplied rather than divided. For example 1Weber which is equal to 1Vs. Saying 1 Volt second doesn't make much sense to me. I understand if it said for example N/m. In general what does it mean to have the units being multiplied rather than divided?
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    Finding the circulation of a vector field

    Thank you for your reply. I didn't know what I was doing, but I used Green's theorem as you said and helped me solve the problem. I integrated with respect to x from 0 to 1 and with respect to y from 0 to x and I obtained the right answer.
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    Understanding the divergence theorem

    thank you all, that was very helpful
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    Understanding the divergence theorem

    Thanks, so would it be correct to say that divergence theorem refers to the amount of flux passing through a surface or volume?
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    Understanding the divergence theorem

    At least pointing out what's wrong would help.
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    Finding the circulation of a vector field

    Homework Statement Can someone guide me through solving a problem involving the circulation of a vector field? The question is as stated for the vector field E = (xy)X^ - (x^2 + 2y^2)Y^ , where the letters next to the parenthesis with the hat mean they x y vector component. I need to find...
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    Understanding the divergence theorem

    I'm having some trouble understanding what divergence of a vector field is in my "Fields and Waves" course. Divergence is defined as divE=∇E = (∂Ex/∂x) + (∂Ey/∂y) + (∂Ez/∂z). As far as I understand this gives the strength of vector E at the point(x,y,z). Divergence theorem is defined as ∫∇Eds...
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    Testing Verilog Code - Find Reason Output Not Displayed

    I don't see how the reset would never be seen. I tried initializing CLKCNTR but I get the same result. The compiler doesn't give me any warnings/errors about that. Also. I was able to test my code on an FPGA and it worked perfectly. I don't understand why it wouldn't work with the simulator...
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    Testing Verilog Code - Find Reason Output Not Displayed

    I don't think I'm following you completely. If there is a block describing the procedure to be done when reset happens, why do I have to check at the edge of reset?
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    Designing and Manufacturing Motherboards

    I'm not discourage, I'm still interested in learning more about it. But I will look more into something that's achievable within the amount of work I can put into and the time dedicated at the moment. Thanks for the link by the way, I will look into it. If there are any other links yo would like...
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    Testing Verilog Code - Find Reason Output Not Displayed

    I have a verilog code for a simple 8-bit counter. I'm trying to build a testbench but for some reason it doesn't work. I'm using xilinx and when I run the simulation, the inputs work but the output doesn't work. It stays as XXX. Here is my verilog code and testbench. module counter(enable...
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