The output plots? Alright. I'm assuming you mean the capacitor voltage when you say Vcc.
V(1) is VDD = 5 V, V(2) is Vi and Vcc (same node), V(3) is the output of the first inverter, V(4) is the output of the second inverter.
Yes, I simulated the circuit using PSPICE. Just from observation of the circuit, I can tell how it behaves for the first few cycles, even without the simulation. I just can't manage to write it down with some work.
At 0 seconds, is the circuit assumed to be in DC steady state? Is it valid...
Homework Statement
Plot the waveforms for capacitor voltage VC, output voltage Vo, and diode voltage Vd given that Vs is a 20 Vpp triangle wave with period T. Use CVD model with diode VON = 0.7 V.
Homework Equations
KVLs?
The Attempt at a Solution
From my basic...