Recent content by wany

Looking at the circuit you attached, I am a little confused. Shouldnt the inputs of the first D flip flop be C1 and Q* and of the second be C2 and Q?

Awesome thank you very much. I was trying to test it in spice, but I can't seem to get my pulse signals right. For initial level I put 0 , pulse level 1, initial delay 0. Now rise time and fall time is where I am having trouble. Then for the period I put either 1/30 or 1/25.

Oh you it would be Q and not Q*. I keep forgetting we don't know which clock has the faster pulse, so I guess that is messing me up a little. Alright so I am thinking about this. So we know that one output of the D flip-flop will never be high. Thus it will always be a 0. The output of...

Also, I do have spice, and have tried to use it but still having trouble. The two clock signals are pulses. 25 pulses/second; 30 pulses/second for the other one

Alright let me see if I understand this correctly so far. So use C1 and C2 as the inputs of an SR latch. Then feed C1 and Q* to a latch and C2 and Q* to another latch. Would we want these two latches to be D flip-flop then since the output takes the value of the input that was present...

I was thinking that a small enough capacitor would do the job, but capacitors were not listed in the possible tools at our disposal.

Ok the top part makes sense. I did the calculations and I see that what you say makes sense. Now I've been thinking about your question but just can't picture anything that would be able to do that. Would we need some type of comparator?

If we fed both of them to an RS flipflop the output would be something like: The truth table is C1...C2...Q...Q* 0...0...Q...Q* 1...0...0...1 0...1...1...0 Therefore say C1 is the faster clock. Then the output of Q would be zero until C2 is high which happens less frequently than Q*...

Ya Ill look into that. I still am not sure where to head with this problem though. Also thank you for your help.

Entirely on paper.

Ya that makes sense since my way did seem very complicated to myself. So just thinking, we know that one pulse is faster than the other. But I am stuck from here.

Homework Statement You have two clock signals (one is 25/sec,other is 30/sec). Design a circuit that takes both clocks as inputs, determines the faster one within a second, and indicates faster one by lighting an led. The led should remain on until reset by a control signal. You may use...

Homework Statement If the network layer is sending a message from A to D via B, it can be sure that a message sent by the data link layer from A to B will always arrive at B, and from B to D will always get to D. How is it possible for the network layer not to be able to correctly deliver a...

Thanks a lot for your help, you I realized that after I drew that picture, but we set it up in the lab and i got it working. Thanks a lot once again.

Ok, so would the beginning of the circuit look like the picture I have attached?