Open watcom f77 - make file problems

[eddyq]

I loaded Watcom 1.9. I built a simple project and added a simple file with just a CALL EXIT and END. But it gives a bunch of make errors. Does anyone know what is going on?

--- make files ---
W:\1830\port\test>type test.mk
project : W:\1830\port\test\test.exe .SYMBOLIC

!include W:\1830\port\test\test.mk1

W:\1830\port\test>type test.mk1
!define BLANK ""
W:\1830\port\test\TRBL$.obj : W:\1830\port\test\TRBL$.FOR .AUTODEPEND
@W:
cd W:\1830\port\test
wfc386 TRBL$.FOR -d2 -q -dep

W:\1830\port\test\test.exe : W:\1830\port\test\TRBL$.obj .AUTODEPEND
@W:
cd W:\1830\port\test
@%write test.lk1 FIL TRBLtest.exeobj
@%append test.lk1
!ifneq BLANK ""
*wlib -q -n -b test.imp
@%append test.lk1 LIBR test.imp
!endif
!ifneq BLANK ""
@%append test.lk1
!endif
*wlink name test d all sys nt op m op maxe=25 op q op symf @test.lk1


W:\1830\port\test>


--- output ---
cd W:\1830\port\test
wmake -f W:\1830\port\test\test.mk -h -e
W:\1830\port\test\test.mk1(2): Error(E08): Invalid macro name ()
W:\1830\port\test\test.mk1(2): Error(E08): Invalid macro name ()
W:\1830\port\test\test.mk1(7): Error(E08): Invalid macro name ()
Error(E02) Make execution terminated
Execution complete

 

[AlephZero]

I think the problem is the $ characters.

In a makefile you can define a "macro variable" by saying something like

SOURCE = one.f two.f three.f

and then reference it by saying

wfc386 ${SOURCE}

which would be is expanded into the command

wfc386 one.f two.f three.f

When you say things like

W:\1830\port\test\TRBL$.obj,

I guess Make thinks the $ is the start of a macro name, and then can't make sense of the "."

Sorry, but I don't use watcom so I can't guess what you are actually trying to do here.

 

[eddyq]

You hit the nail on the head ... I removed the $ and it compiles OK now.

Thanks