7 segments display difficult problem

[hitham]

hi there ...

I got a question about the 7 segments display .. I need help please because I am lost now ..

the question is asking to design a combinational logic circuit using AND , OR and NOR gates for two outputs that will display the last two digits of my passport number . (note if the last two digits are same choose the next higher digits ,,

this was the question ..

I made the truth table because it's very easy ,, but then what should I do .. the problem is in the question they asked us to use the AND , OR and NOR gates only so how am I going to use it without using any decoder ,, also how to design the circuit so I can enter 4 digits number and display the last two digits ?

seriously I am confused right now because I am in the 1st sem year 1 and I need any help in that ..

thanks guys

 

[berkeman]

hi there ...

I got a question about the 7 segments display .. I need help please because I am lost now ..

the question is asking to design a combinational logic circuit using AND , OR and NOR gates for two outputs that will display the last two digits of my passport number . (note if the last two digits are same choose the next higher digits ,,

this was the question ..

I made the truth table because it's very easy ,, but then what should I do .. the problem is in the question they asked us to use the AND , OR and NOR gates only so how am I going to use it without using any decoder ,, also how to design the circuit so I can enter 4 digits number and display the last two digits ?

seriously I am confused right now because I am in the 1st sem year 1 and I need any help in that ..

thanks guys

Welcome to the PF. Show us your truth table. Do you know how to draw a Karnaugh Maps from the truth table? That is the next step, and that will give you equations for your outputs that you can implement with the gates you mentioned.

 

[hitham]

88888
thanks berkeman



I attached the truth table and karnugh map for the segment a .. but how to group it to find the equation ,,

 

[berkeman]

88888
thanks berkeman

I attached the truth table and karnugh map for the segment a .. but how to group it to find the equation ,,

I'm not sure which segment your K-map is for... which one is it? You need one for every segment that you are going to drive with your logic.

Also, are your 7-segment displays common anode (CA) or common cathode (CC). It makes a difference in how you drive each segment -- with either a logic high or a logic low.

After you draw your K-maps for each segment, you use grouping to come up with the simplest sum of products for each output term:

http://en.wikipedia.org/wiki/Karnaugh_map

Then you use AND-OR logic (with NOR gates used for any inversions of terms that you need as inputs) to make each sum of products output term to drive the segments.

 

[hitham]

thanks a lot for ur information but I got two question ..

when u want to simulate the circuit in multism how to get the common cathode or either the common anode ,, I mean how to calucalte the resistor and power supply ,.,

as well what is the difference between common cathode and common anode when connect the circuit ?


thanks again

 

[berkeman]

thanks a lot for ur information but I got two question ..

when u want to simulate the circuit in multism how to get the common cathode or either the common anode ,, I mean how to calucalte the resistor and power supply ,.,

as well what is the difference between common cathode and common anode when connect the circuit ?


thanks again

You model them as LEDs, which they are. You calculate the series current limiting resistors' value by assuming about a 2V drop across the LED, and dropping the rest of the voltage across the resistor (assuming your drive gate or transistor has negligible voltage drop).

This page: http://www.hobbyprojects.com/components/7_segment_displays.html
shows some info about a CA 7-segment display, and discusses the CC option.