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Designing a 2-bit Comparator with NOR gates

  1. Nov 4, 2017 #1
    At our class on digital structures, this assignment has been given. It's a preparation for upcoming lab work, and I'm not sure my design is correct. Is anyone please willing to check it out?
    1. The problem statement, all variables, and given/known data
    Design a two-bit comparator using NOR gates exclusively. Your circuit should yield 1 when ## A \geq B ##.

    2. Relevant equations
    I'm not sure any equations can be put here.

    3. The attempt at a solution

    I uploaded multiple files which are directly excreted from a PDF file I have to attach to my assignment. I hope it is not pesky!
    I began by writing a truth table. In the next step, I proceeded with writing down conjunctive normal form (CNF) and minimizing it in the next step. To obtain the minimal conjunctive normal form (MCNF), I did use Mathematica to aid me with simplification. To obtain the logical formula that resembles NOR gate operation, MCNF has to be negated twice and solved using de Morgan theorem.
    In the last step, circuit design. Using KiCad, I drew a circuit that implements only NOR gates.

    If you see any fallacies, please let me know. I hope you're having a wonderful Saturday!
     

    Attached Files:

  2. jcsd
  3. Nov 4, 2017 #2

    phinds

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    Why do you have any inputs other than A and B ??? I think you are making this into something it is not.
     
  4. Nov 4, 2017 #3

    berkeman

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    Yeah, what are A3 and A4 in your Drive3 diagram?
     
  5. Nov 5, 2017 #4
    First, I shall reply to @phinds. A task we were given states that inputs A and B consist of two bits, namely A1, A0 and B1, B0. I should also note I have no experience building circuits, so it is possible my comprehension of the problem is completely fallacious.

    @berkeman, thank you for pointing out my superficial mistake! It should be
    A1 ... A1
    A2 ... A0
    A3 ... B1
    A4 ... B0
    I will check my derivation again, it could be I missed more than that.
     
  6. Nov 5, 2017 #5
    OK, I checked my derivation again, this time using a much more appropriate notation. In Mathematica, I've written down this expression (please check the truth table):
    (a1 || a0 || b1 || (! b0)) && (a1 || a0 || (! b1) || b0) && (a1 || a0 || (! b1) || (! b0)) && (a1 || (! a0) || (! b1) || b0) && (a1 || (! a0) || (! b1) || (! b0)) && ((! a1) || a0 || (! b1) || (! b0))
    I simplified it and obtained (a0 || a1 || ! b0) && (a0 || ! b0 || ! b1) && (a1 || ! b1). This means that my circuit should look completely different!
     
  7. Nov 5, 2017 #6

    phinds

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    And yet you have used the NEGATIVE of a couple of those as thoughthey were part of your allowed inputs.
     
  8. Nov 5, 2017 #7

    CWatters

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    Those are easily made using a NOR gate as an inverter so not a major problem. The other problem is worse.
     
  9. Nov 5, 2017 #8

    phinds

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    Of course, which is what he should have done. I'm just point it out to him. He seems to think they are part of the allowed input, not that he has to derive them.
     
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