Active high vs active low reset pins on flip flops

[null void]

Need help in understand the "Markers" on electronic chips

I am just wondering what is the markers telling us, like what has shown in the diagram, the CLR is telling us if we apply active-high state input to that port, the flip flop will be reset right? But there is some case where the Markers is labeled as CLR' (bar-CLR) and there is a bubble attached at the port it should be something like "NOT gate". So in this case how do i determine whether should i apply high or low state to reset my flip flop?

If CLR is labeled without bar, does it mean when the port receive high state, ff is reset;
and if CLR is labeled with bar, does it mean when the port receive low state, ff is reset?

Do the bubble determine anything?

 

[null void]

https://www.filesanywhere.com/Viewplay/getCanvasImageElink.aspx?PATH=\SELENIUM\delete.png&IMAGETYPE=O&MODELPARAM=&H=768&W=1366&r=574777

This is the type of flip flop i see in my note, if the CLR port is active-Low, so supplying high state into the port will get inverted by the bubble b4 the port then become low, so can i say the flip flop is reset in this configuration?


But my note keep using this kind of configuration to avoid the flip flop from getting reset...

 

[berkeman]

No, the bubble is a marker, not an active thing. The bubble indicates active low for inputs, so the CLR~ input clears the FF when it is driven low. And the bubble and > markings on the clock input indicate that the clock causes the data to propagate on the negative-going edge of the clock input.

 

[null void]

oh, is that mean there is no such things like a CLR~ without bubble marker?

 

[berkeman]

oh, is that mean there is no such things like a CLR~ without bubble marker?

Correct. No bubble means you use the active high signal CLR. A bubble means that the active low signal CLR~ is used to clear the FF.

 

[null void]

Ah I see, thank you very much :)

 

[tfr000]

Take a look at this, which explains a little about why designers use certain symbols:
http://www.eetimes.com/document.asp?doc_id=1274541

This page also explains some of it about halfway down, under "DeMorgan's Theorem":
http://www.physics.mcmaster.ca/phys4db3/Lab/chapter5.htm

Also
http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/gate.html#c2

and this slide show isn't bad
http://webdocs.cs.uAlberta.ca/~amaral/courses/329/webslides/Topic8-DocTimeDiagrams/sld011.htm

I couldn't find any pages that do a fantastic job of explaining this...