Back gating of Metal/Semiconductor junction

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The discussion focuses on the effects of applying a negative polarity back-gate to an n-type semiconductor in contact with a metal, specifically regarding the formation of a depletion layer and band bending at the metal-semiconductor interface. It highlights that a sufficient negative voltage can lead to hole accumulation, causing inversion beneath the gate. Additionally, it addresses the impact of repelled electrons on the depletion layer width at the junction, emphasizing the necessity of a circuit to apply bias effectively. The interplay between the back-gate voltage and the metal-semiconductor junction is crucial for understanding device behavior.

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fk08
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When a metal is brought into contact with a semiconductor (n-type) a depletion layer is formed at the metal-semiconductor interface on which band bending occurs. In the full-depletion model it is assumed that all donors are positively charged (withi this layer). What happens if a back-gate (with a insulating thin layer) at the back-side of the semiconductor is placed with a negative polarity?

Similar to pnp MOSE FETs I would expect that for a sufficient large voltage the chemical potential is driven into the valence band so that right under this gate an accumulation of holes is created, i.e. inversion. But what happens with the repelled electrons? Can they affect the depletion layer width at the metal-semiconductor junction through recombination with the ionized donors?
 
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Negative polarity with respect to what? You need a circuit to apply a bias. The other end of the battery would go to the other metal. So you're basically putting a positive bias on the metal of the M-S junction. This does affect that depletion width.
 

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