Basic Logic Circuit for a vending machine

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Homework Statement


Design a logic circuit to simulate the circuitry that might exist in a vending machine. the vending machine accepts inputs of nickels, dimes, and quarters but only one of each. It dispenses water and beer. Use three logic switches to simulate the coin detectors one each for nickels dimes and quarters. and two indicator lights for water and beer. for amounts less than 15 cents, no output is given. for amounts of 15-30 cents, water is dispensed. for amounts over 30 cents, beer is dispensed.

This problem was assigned in my 3 hour lab period today, and none of the groups were able to draw out a sketch of the possible AND, OR, and NAND combinations that could make this circuit work.


Homework Equations





The Attempt at a Solution



I'm just beginning in digital logic so i don't have much logical background. I started off by making a truth table

N D Q W B
0 0 0 0 0
0 0 1 1 0
0 1 0 0 0
0 1 1 0 1
1 0 0 0 0
1 0 1 1 0
1 1 0 1 0
1 1 1 0 1


we used 1 7408 series AND gate chip, but I don't really know how to draw out the circuit. It's worth a hefty amount of points on my exam wednesday morning so any help would be appreciated in drawing how this circuit would work
 
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http://www.utcbanyat.com/Web%20_Digital/GATE%20PICTURE/7408.gif

is the picture of the chip we used. i know the outputs are pins 3 and 11, but if i were to draw out the circuit logically, OR use it on a breadboard, how would i get this to work?
 
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You're only allowed to use one Quad AND IC to implement the truth table? AND gates by themselves are not sufficient to implement general logic. If you are asked to use just the single Quad AND IC, then you will have to use some tricks to implement that truth table, it would seem.

If you are allowed to use any number of NAND gates (which are sufficient by themselves to implement general logic), or if you can use a mix of inverters, OR and AND gates, then you would re-write the truth table above, with the 3 left columns sorted in an order so that only one bit changes at a time (what is this ordering called?), and then draw 2 Karnaugh maps -- one for each output. Then group terms on the K-maps, and implement those minterms with your logic gates. Sound familiar?

http://en.wikipedia.org/wiki/Minterms

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