Solving Bus Loading Issue w/16-bit Parallel Input to 8-Bit Bus

[BobG]

I need to take a 16-bit parallel digital input and transfer it to an 8-bit bus. I'm able to capture the 16-bit input by splitting the input and sending one through an ALS373 tri-state latch and the other half through 2 ALS373's, but I'm having problems with the bus interface.

I picked a tri-state latch because it's not supposed to load the bus when the chip is 'off'. Yet, when I model it on pSpice with the output of my 373's kept separate, I'm getting about 3.2V for high and 0.2 V for low, and 1.4 V for off (which matches the data sheet). When I hook both to the same bus, I'm only getting 2.2V for high, 0.6V for low and 1.4V for off. The timing is good, but the voltages are disturbing.

Eventually, there's going to be about 4 input devices and 4 output devices (actually, more, but they go through a mux so I have 2 16-bit input channels and 2 16-bit output channels that interface with an 8-bit bus), plus a PLD and a USB on the bus so killing my signal so quickly is a very bad sign.

I have to admit, just looking at the data sheet, I was a little curious about how the tri-state latch was going to isolate my device from the bus. With a max 20 uA output current for the off state, it seemed reasonable to believe it would work, but I've never had to interface with a shared bus before, which creates some problems.

In order to get an actual voltage reading instead of just high or low, I tossed 1K resistors between my outputs and ground. I'm not sure that really models the bus that well.

Do I need to couple all of the devices to the bus via some other means, or do these tri-state latches really isolate my device and I just didn't model my bus properly?

The idea is that external analog signals are constantly sampled, converted to digital, and stored in a microcontroller and periodically are transferred to a PC depending on what the user wants to look at.

 

[berkeman]

The tri-state buffers should work. Can you post a schematic of what you are doing? Are all the devices powered from a 5V rail?

 

[BobG]

The quick test is posted here. I was only working with one line because the logic and timing was the only thing I was originally concerned about. Testing the loading was an afterthought. Since I've never worked with a bus, it occurred to me that I should probably start taking a look at how this would actually work.
http://img111.imageshack.us/my.php?image=ckttest1no8.jpg

It's nice to read that the chips will work, but it would have been better to see that they'll work since I don't have any experience hooking to a bus. I'm thinking modeling the input to the microcontroller instead of dead ending the bus line probably would have been a better test, but was kind of looking for a quick reassurance that the 373's were what I wanted before I got too far along.

 

[BobG]

Hmmm, interesting.

If I model the input of the microcontroller side of the bus, plus add another idle device, the voltages stay at just under 2.3V for high, about 0.65V for low, and about 1.4V for off.

That's good enough since I have to be above 2V for a high and below 0.8V for low, but I didn't expect that. And I take it that won't stay constant as I add more devices. It surely has to be just a real slow decline (I don't have enough room or time to keep adding devices, since I really should be working on the other parts of the design.)

 

[berkeman]

http://img111.imageshack.us/my.php?image=ckttest1no8.jpg

Why are you shorting most of the 373 outputs dead to ground? Am I misreading the schematic?

 

[BobG]

Why are you shorting most of the 373 outputs dead to ground? Am I misreading the schematic?

Whatever happened with one line must happen on all the other lines, right? (In other words, I was looking for a quick preliminary picture and was too lazy to set up the entire circuit).

I added more to it once I knew I wanted to use the 373's.

http://img48.imageshack.us/img48/5407/digitalinputok9.jpg

The resistors and 373 in the bottom right hand corner will get deleted. I just wanted at least something to model to the other side of the bus. The permanently idled 373 will come out, as well. I wanted to see if the voltages came down even lower with another device on the bus. And, of course, the timing of the control signals will change as well.