D Latch using Transmission Gates

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Discussion Overview

The discussion revolves around the purpose and function of three inverters in a D latch circuit using transmission gates, as presented in a textbook on digital integrated circuits. Participants explore the implications of buffering, feedback, and voltage levels in the context of digital memory elements.

Discussion Character

  • Technical explanation
  • Conceptual clarification
  • Debate/contested

Main Points Raised

  • One participant questions the necessity of the three inverters, noting that their purpose is not explained in the book or found in online resources.
  • Another participant suggests that inverters are generally used to buffer inputs and outputs to achieve high input impedance and low output impedance.
  • A different participant explains that two inversions can create a non-inverting amplifier and describes the function of the lower inverter as an input buffer amplifier, while the upper two inverters provide positive feedback for digital memory.
  • One participant challenges the need for inverters, arguing that two inverters in series produce the same output as the input, questioning their utility.
  • Another participant elaborates that two inverters can create a flip-flop, which serves as a memory element.
  • One participant proposes that inverters may compensate for voltage drops, ensuring that the output remains within logic levels over time.

Areas of Agreement / Disagreement

Participants express differing views on the necessity and function of the inverters, with no consensus reached on their overall purpose in the circuit.

Contextual Notes

Participants highlight various assumptions about buffering, feedback, and voltage levels, but these remain unresolved within the discussion.

jaus tail
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TL;DR
Why is inverter used for D Latch using Transmission Gates?
My book has this diagram:
246326

Book: Digital Integrated Circuits by Jan M. Rabaey

I don't understand the purpose of using the three Inverters. It's not mentioned in the book, nor could I find anything on the internet.
 

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Probably because you generally want to buffer all inputs and outputs (to get high input impedance and low output impedance. The only time I've used an unbuffered inverter is in some crystal oscillator circuits...
 
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jaus tail said:
I don't understand the purpose of using the three Inverters.
Two inversions cancel to make a non-inverting amplifier.

The lower inverter is an input buffer amplifier. Q follows D, through two inverters, while the lower transmission gate is conducting.

The upper two-inverter loop provides a positive feedback digital memory. It holds the last digital output state while the D input is isolated and the upper transmission gate is conducting.

It is a “sample and hold” circuit, applied to a digital signal.
 
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But why do I need inverters? If the two inverters are in series, the output is same as input. I might as well not use them.
 
jaus tail said:
If the two inverters are in series, the output is same as input. I might as well not use them.
With two inverters, if you feed the output of each, back to the input of the other, you have a flip-flop which is a memory element.
 
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246471
 
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Also maybe it can be that inverter also makes up for voltage drop if any. Like inverter will again either pull up to 5 V or 0 V. Like if memory has output as 5 V, then with time it may degrade to 4.5 V and then to 3 V. If it goes below 2.5 V, it may be treated as logic 0.

So with 2 inverters the 4.5 V is again pulled up, and logic remains high.
 

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