Comparator design using a 4-bit adder

In summary: The XOR gates are for doing 2's complement (i am thinking in this way). But I know that 2's complement is not just inverting 1 and 0, but also needs to add 1 after that.
  • #1
ichabodgrant
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0

Homework Statement


Hi, it's me again.
Now I am going to design a 4-bit magnitude comparator using just ONE 4-bit adder and infinitely large number of gates (AND, OR, NOT, NAND, NOR, XOR, XNOR) for signed numbers (negative binary).

a 4-bit magnitude comparator using 4-bit adder for signed values.png


Homework Equations


A > B => A3barB3 + A2barB2x3 + A1barB1x3x2 + A0barB0x3x2x1

similar for A < B and A = B.

The Attempt at a Solution


a 4-bit magnitude comparator using 4-bit adder for signed values_attempts.png
[/B]
This is my attempt. Frankly, this is my first time encountering problems related to comparator design because this is never said to be in the syllabus of the course (introductory course). I find this in a past paper... seemingly indicating that the instructor wants us to divide and conquer it within the 3 hours of exam.

I do this all by resources on the internet. So there may be a lot of mistakes.
 
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  • #2
I think you are on the right track, but I have some comments:
  • Where is the Cin coming from? You are only comparing two 4-bit numbers!
  • Are the numbers supposed to be in two's complement?
And - there are only 16 combinations possible. I suggest making a truth table before continuing.
 
  • #3
I think it should be using 2's complement.
 
  • #4
ichabodgrant said:
I think it should be using 2's complement.
Then get busy on your truth table.
 
  • #5
A truth table looks like this? because I have never drawn a truth table for such a design...so I searched on google...
 

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  • #6
I have a question about the XOR gates. Are those XOR gates for doing 2's complement (i am thinking in this way)?
But I know that 2's complement is not just inverting 1 and 0, but also needs to add 1 after that. It seems that the above design cannot do that?
 
  • #7
And you mentioned that there should not be Cin? Does this mean there are no cascading inputs?
 
  • #8
ichabodgrant said:
A truth table looks like this? because I have never drawn a truth table for such a design...so I searched on google...
No. I meant the truth table for what you are trying to design. Since you are trying to compare two 4-bit 2's complement numbers, create a table with the A-numbers horizontally (-8 to +7) and the B-numbers vertically (-8 to +7). Now fill in the interior of the table with the result of the comparison you want (e. g. A>B). After you have done that, start thinking about how to implement it.
 

FAQ: Comparator design using a 4-bit adder

What is a Comparator?

A Comparator is a digital logic circuit that compares two numbers and determines whether one is greater than, equal to, or less than the other.

What is a 4-bit adder?

A 4-bit adder is a digital circuit that can perform addition on two 4-bit binary numbers. It is made up of four full adders and can add two 4-bit numbers together to produce a 5-bit output.

How does a Comparator using a 4-bit adder work?

A Comparator using a 4-bit adder works by taking in two 4-bit numbers and feeding them into the inputs of the 4-bit adder. The output of the adder is then compared to determine the relationship between the two numbers.

What are the applications of Comparator design using a 4-bit adder?

Comparator design using a 4-bit adder has many applications in digital systems, such as in arithmetic operations, data sorting, and decision-making processes. It is also commonly used in microprocessors and microcontrollers.

What are the advantages of using a 4-bit adder in Comparator design?

The main advantage of using a 4-bit adder in Comparator design is its simplicity and efficiency. It requires fewer components and less power compared to other types of adders, making it a cost-effective solution for digital systems.

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