Electrical Circuit Question - Integrating Amplifier

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Homework Help Overview

The discussion revolves around an electrical circuit problem involving an integrating amplifier. Participants are exploring the behavior of the circuit, particularly focusing on the operational amplifier's role in maintaining voltage levels and the relationship between various currents and voltages in the circuit.

Discussion Character

  • Exploratory, Conceptual clarification, Problem interpretation

Approaches and Questions Raised

  • The original poster attempts to apply Kirchhoff's Current Law (KCL) but expresses uncertainty about its application in this context. Participants question the implications of the operational amplifier's behavior on the circuit's nodes and currents, particularly regarding the voltage at Node A and the output voltage (Vout).

Discussion Status

Participants are actively engaging with the problem, with some providing insights into the relationship between the output voltage and the capacitor's voltage. There is a mix of interpretations regarding the behavior of Vout and its necessity to maintain Node A at zero volts. The discussion appears to be productive, with guidance being offered, although no consensus has been reached.

Contextual Notes

There is an ongoing exploration of the assumptions related to ideal operational amplifiers, including the implications of zero current into the inputs and the voltage conditions at various nodes in the circuit.

GreenPrint
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Homework Statement



http://img801.imageshack.us/img801/4227/capturebsw.png

Homework Equations


The Attempt at a Solution



Alright I'm not really sure how to solve this problem. I have redrawn the circuit below without the operational amplifier. In ideal operation amplifiers there's no current going into the positive and negative inputs and the voltages are also the same.

http://img254.imageshack.us/img254/963/capturenpcq.png

My initial thoughts to solving this problem was to use KCL. I'm however unsure how to do this in this situation. I_{1} is both entering and leaving the upper node at 0 V and I_{f} is entering the node. So does this mean that I_{f} is zero?

Thanks for any help you can provide.
 
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Since the op-amp wants to keep the node at the top of I1 (Let's call it Node A) at zero volts, it must do so by dropping Vout to compensate for the voltage that builds up on the capacitor.

If node A always at zero potential, what's the current through R1 at all times?
So where does I1 go? What then is an expression for Vc (the potential across the capacitor) with respect to time?
 
So if I understand correctly you mean that Vout becomes zero?
 
GreenPrint said:
So if I understand correctly you mean that Vout becomes zero?

No, Vout becomes whatever is necessary to nullify the effect of Vc, keeping Node A at zero.

Vout + Vc = 0V.
 
Thank you for your help. I was able to solve the problem.
 

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