Help with VHDL Serial Port for Automated HVAC Thermostat

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SUMMARY

The discussion centers on implementing a VHDL-based automated HVAC thermostat that monitors individual room temperatures using a 4-bit parallel input multiplexed into a state machine. The user seeks assistance in developing a Visual Basic GUI for serial communication to retrieve current temperatures and adjust set points. They express confusion regarding UART implementation and state machine design. The transition from Quartus to ISE for FPGA development raises concerns about potential pitfalls in the process.

PREREQUISITES
  • Understanding of VHDL programming and state machines
  • Familiarity with UART communication protocols
  • Experience with Visual Basic for GUI development
  • Knowledge of FPGA development tools, specifically ISE
NEXT STEPS
  • Research UART design and implementation in VHDL
  • Learn how to create a state machine for serial data processing
  • Explore Visual Basic libraries for serial communication
  • Review best practices for transitioning from Quartus to ISE in FPGA projects
USEFUL FOR

Electronics engineers, VHDL developers, and anyone involved in designing automated HVAC systems or working with FPGA implementations.

keith03
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Ok. I had a VHDL class last year, and I have muscled through a project that I started on my own, but now I am a bit stuck. I implemented an automated HVAC thermostat that will moniter each room individually. Each room had a 4 bit parallel input that was muxed into a state machine. The set point was also muxed in, and set through dip switches. I would like to make a VB GUI that will allow for serial comm. Through this, I would like to get the current room temp, and also change the set points. I need help in laying out my intentions here. I really don't know where to go next. I have found example UARTs online, and I don't completely undrstand exactly what my options are here. My first thought is to create a state machine that looks for a specific word of data, and then looks at my existing "code." I really am a bit confused. Anybody have some good design approaches to this? I would like to understand how. Thanks ahead of time.

Also, all of my work before was for a PLD using Quartus, this time I am using ISE with a FPGA. Any major do's and dont's with the switch? I figured out how things are suppose to work through tutorials and tooling around, but I don't want to screw anything up. Thanks again.
 
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