How does one decode a 6 bit binary to 2 7 segment display?

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Discussion Overview

The discussion revolves around the challenge of decoding a 6-bit binary number to display it on two 7-segment displays using integrated circuits (ICs). Participants explore various methods and components, including binary to BCD conversion, the use of ROMs, and the limitations imposed by cost and component availability.

Discussion Character

  • Technical explanation
  • Debate/contested
  • Homework-related

Main Points Raised

  • One participant notes that a 3-bit 2-input multiplier results in a maximum of 6 bits, with a maximum integer product of 49, complicating the display on two 7-segment displays.
  • Another participant suggests that there are ICs available for binary to BCD conversion, which may be more cost-effective than using numerous individual logic gates.
  • A proposal is made to use a ROM or lookup table for the conversion process.
  • Several participants express confusion regarding the requirement to use only ICs, questioning the cost comparison to other solutions like microcontrollers.
  • It is clarified that the 74LS48 IC is designed for BCD to 7-segment conversion for a single digit, necessitating the splitting of the 6-bit result into two digits.
  • One participant mentions attempting to replicate a binary to BCD method using a 4-bit adder IC (74LS83) and a comparator circuit, but reports difficulties in implementation.
  • There is a discussion about the potential use of the 74HCT series parts, which are noted to be cheaper and require less supply current, though one participant expresses uncertainty about their use due to project constraints.

Areas of Agreement / Disagreement

Participants do not reach a consensus on the best approach to decode the 6-bit binary number. Multiple competing views and methods are presented, with some uncertainty regarding the requirements and component choices.

Contextual Notes

Participants express limitations regarding the availability of certain ICs and the requirement to use only ICs, which may affect their design choices. There are unresolved questions about the specific implementation details and the appropriateness of certain components.

AilingLore21
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So a 3 bit 2 input multiplier has a maximum of 6 bits and the max integer product is 49. Problem is I have no idea displaying it in 2 seven segment displays since the 74LS48 decoder only has 4 inputs and 7 output, only good for a single 7 seg. And we are required only to use ICs which is rather costly for us. I thought about using a multiplexer but that would be too costly since it would have a lit of AND gates.
 
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There are ICs doing binary -> BCD conversion. And they are certainly cheaper than hundreds of individual logic gates. That conversion is messy, there is no easy way of doing it.
 
How about using a ROM, look up table?
 
AilingLore21 said:
... And we are required only to use ICs which is rather costly for us. ...
I don't understand this requirement. Only ICs, as compared to what? Costly, compared to what (micro-controller? That's an IC also)? And why?

Is this homework, or an exercise, or an actual product design?
 
NTL2009 said:
I don't understand this requirement. Only ICs, as compared to what? Costly, compared to what (micro-controller? That's an IC also)? And why?

Is this homework, or an exercise, or an actual product design?
A group project. Our professor is strangely old fasioned. Anyway, I'm curious about ROMS. Do they need any IC connections?
mfb said:
There are ICs doing binary -> BCD conversion. And they are certainly cheaper than hundreds of individual logic gates. That conversion is messy, there is no easy way of doing it.
I thought 74LS48 ICs were Binary to BCD ones? Are there more?
 
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74LS48 is BCD to 7 segments for a single digit. You have to split up your 6 bit binary multiplication result to the two digits.
 
AilingLore21 said:
And we are required only to use ICs which is rather costly for us.

Can you elaborate on these points? If only using ICs a ROM like NTL2009 suggested or a CPU would be easiest and probably the CPU would be cheapest. Can you use the 74HCT series parts? They are much cheaper and require a smaller supply current.

BoB
 
mfb said:
74LS48 is BCD to 7 segments for a single digit. You have to split up your 6 bit binary multiplication result to the two digits.

I did some digging and found out using Binary to BCD method. Problem is the 85 ICs have been phased out for decades according to some forums. I'm trying to replicate it using a 4 bit adder IC (74LS83) and a comparator circuit gates so it adds 3 whenever the output goes beyond 4. I'm having no luck on Logisim whatsoever. Since the inputs are 6 bits, bit number 6 and bit number 5 goes into the 1st 74LS83? And should I add 3 to these 2 bit inputs on the first 83?

2009-03-21_21-13-25-859.png

The second image is the closest I could find but it's a BCD to Binary one:

binary-to-bcd-gif.18767.gif
 
Last edited:
rbelli1 said:
Can you elaborate on these points? If only using ICs a ROM like NTL2009 suggested or a CPU would be easiest and probably the CPU would be cheapest. Can you use the 74HCT series parts? They are much cheaper and require a smaller supply current.

BoB

I'm not familiar with the 74HCT. Supposedly, we're not to use them but since the deadline is a week away, I'm seriously tempted to.
 

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