How to Design a BJT Pre-Amplifier to Meet Specific Requirements?

[aruna1]

Homework Statement

I have to design a multistage bjt pre amplifier with following conditions
gain 20-60dB
input impedence >= 5K ohm
output impedence <= 100 ohm
bandwidth 300Hz - 3MHz
source impedence 600 ohm
load impedence 10 K ohm


can someone please give me a good tutorial link which i can learn to design above pre amplifier?
thanks

Homework Equations

The Attempt at a Solution

 

[vk6kro]

You could check your lecture notes to see the way your lecturer wants you to do this.

I don't know of any websites that would show you how to design such an amplifier.

However there are some general rules that might help.

Input impedance of BJT amplifiers can be increased (from about 1 K) by adding an unbypassed emitter resistor. The effect of this gets multiplied by the hfe of the transistor, so even 100 ohms has a big effect on the input impedance. The bias resistors appear in parallel with this impedance, so you need to keep them fairly high resistance. This may mean using a single resistor biasing scheme.

Bandwidth depends on stray capacitance, which you are not given. However, you can get wide bandwidth by having a number of low gain stages. If you restrict the gain to about 5 the bandwidth will be good.

Gain is roughly equal to the ratio of collector resistor to emitter resistor.
So, a stage with a 560 ohm collector resistor and a 100 ohm emitter resistor will have a gain of about 5. Two such stages will have a gain of about 25.
If the impedance was constant, this would be a gain of about 28 dB.

Low output impedance is available from an emitter follower. The impedance is much lower than the resistance of the emitter resistor.

You should try to have about half of the supply voltage across each transistor when there is no signal. This allows you to have maximum output from the amplifier.

 

[aruna1]

You could check your lecture notes to see the way your lecturer wants you to do this.

I don't know of any websites that would show you how to design such an amplifier.

However there are some general rules that might help.

Input impedance of BJT amplifiers can be increased (from about 1 K) by adding an unbypassed emitter resistor. The effect of this gets multiplied by the hfe of the transistor, so even 100 ohms has a big effect on the input impedance. The bias resistors appear in parallel with this impedance, so you need to keep them fairly high resistance. This may mean using a single resistor biasing scheme.

Bandwidth depends on stray capacitance, which you are not given. However, you can get wide bandwidth by having a number of low gain stages. If you restrict the gain to about 5 the bandwidth will be good.

Gain is roughly equal to the ratio of collector resistor to emitter resistor.
So, a stage with a 560 ohm collector resistor and a 100 ohm emitter resistor will have a gain of about 5. Two such stages will have a gain of about 25.
If the impedance was constant, this would be a gain of about 28 dB.

Low output impedance is available from an emitter follower. The impedance is much lower than the resistance of the emitter resistor.

You should try to have about half of the supply voltage across each transistor when there is no signal. This allows you to have maximum output from the amplifier.

problem is lecturer didnt teach how to design it.he said learn your selfs and design

anyway I'm thinking of using bc639 transistor.so in its data sheet there is HFE values max and min but no hfe values.so can i get HFE = hfe? and should i get intermidetae value between max HFE and min HFE?

one otherthing is there anyway of using gain band width product in this design?

thanks for your help

P.S. how to select base resistors?

to get large input impedence we need r_pi to large right? so since
r_pi = B/gm ;(B=beta)
we need higher B value.coz gm is fixed if we use R_c=560 ohm and VR_c=6V (half voltage)
-->I_c=10mA --> gm=I_c/V_t =10/25=0.4

 

[vk6kro]

If you know the size of emitter resistor and collector resistor and you know the transistor has to have half the supply voltage, you know the collector current.
Take the average HFE and work out the base current and then the base resistor(s).

That gain bandwidth shows that the transistor will not be the limiting factor, but stray capacitance in the circuit may be.

Have a try at designing something from the rules in my first post. Wait at least 2 days before asking any more questions. You should be doing this yourself.

to get large input impedence we need rpi to large right? so since
rpi = B/gm ;(B=beta)
we need higher B value.coz gm is fixed if we use Rc=560 ohm and VRc=6V (half voltage)
-->Ic=10mA --> gm=Ic/Vt =10/25=0.4

Don't use gm for BJTs.

 

[aruna1]

If you know the size of emitter resistors and collector resistors and you know the transistor has to have half the supply voltage, you know the collector current.
Take the average HFE and work out the base current and then the base resistor(s).

That gain bandwidth shows that the transistor will not be the limiting factor, but stray capacitance in the circuit may be.

Have a try at designing something from the rules in my first post. Wait at least 2 days before asking any more questions. You should be doing this yourself.

to get large input impedence we need rpi to large right? so since
rpi = B/gm ;(B=beta)
we need higher B value.coz gm is fixed if we use Rc=560 ohm and VRc=6V (half voltage)
-->Ic=10mA --> gm=Ic/Vt =10/25=0.4

Don't use gm for BJTs.

isnt gm fr small signal analysis?

 

[vk6kro]

Have a try at designing something from the rules in my first post. Wait at least 2 days before asking any more questions. You should be doing this yourself.

 

[aruna1]

Have a try at designing something from the rules in my first post. Wait at least 2 days before asking any more questions. You should be doing this yourself.

sorry to push this but i have to submit working cct on monday.have to design pcb too.all above this is a kind of punishment he gave to us coz we wee shouting when he enters da class :) .so problem is we don't have time to learn every bit,so any help will be highly appreciated(last year this assignments were given after completeing the module,this time before beginig the module :( ).and i searched for designing rules for internet (for some simple tutorial for 2 stage bjt pre amp) but was unsuccessful.there is no reference.(therewas one but it didnt help).
thanks.

 

[vk6kro]

Your best bet then is to go with the circuit I described to you and then analyse it to see how it should perform.

So, how much have you drawn up so far?

Are you able to build it with real components before you commit to a printed circuit board?

 

[aruna1]

Your best bet then is to go with the circuit I described to you and then analyse it to see how it should perform.

So, how much have you drawn up so far?

Are you able to build it with real components before you commit to a printed circuit board?

well i drowned one according to your rules but it does not simulate well.

i can make this on vero board before pcb.

i need two stage bjt pre amp.but i don't know output impedence of first stage and input impedence of second age.
and how to set this upper frequency (3MHz) and lower freq (300Hz) 3db cut off
how to decide coupling capacitor values.

lot of problems
can you post a step by step procedure with relevant equations?
so i can design amp with that procedure.
thanks

 

[vk6kro]

You would need to remove C3 and C4. I know it drops the gain if you do this, but it makes the gain predictable and extends the bandwidth.

Then you can calculate the input Z of each stage and also the size of the capacitors. The reactance of the capacitors should be about 10% of the input Z of the next stage at the lowest frequency.

You will also need an emitter follower as the last stage to get that low output impedance.

can you post a step by step procedure with relevant equations?
so i can design amp with that procedure.
Somebody else might like to do that, but not me. :) You won't learn much from this exercise if you haven't done the theory, but you won't learn anything if someone spoonfeeds you.

Bring the signal generator down to 1 KHz for initial testing.

 

[aruna1]

ok what is the input impedence of second stage?

 

[vk6kro]

About 3000 ohms.

We have 3 resistors in parallel.
25400 ohms, 4700 ohms and (HFE times 100 ohms)
So that is 3966 ohms and something like 10000 ohms if HFE is 100.

That 4.7 k needs to go. Calculate a single bias resistor to give the base current.

The capacitors are also too small. More like 2 uF would be better.

 

[aruna1]

About 3000 ohms.

We have 3 resistors in parallel.
25400 ohms, 4700 ohms and (HFE times 100 ohms)
So that is 3966 ohms and something like 10000 ohms if HFE is 100.

That 4.7 k needs to go. Calculate a single bias resistor to give the base current.

The capacitors are also too small. More like 2 uF would be better.

no no, what i meant is what should be the input impedence of second stage if i want to designit irrespective to cct above posted

and what is that
HFE times 100 ?

and sholudnt we consider r_pi of 2nd transistor

 

[vk6kro]

Input impedance of BJT amplifiers can be increased (from about 1 K) by adding an unbypassed emitter resistor. The effect of this gets multiplied by the hfe of the transistor, so even 100 ohms has a big effect on the input impedance. The bias resistors appear in parallel with this impedance, so you need to keep them fairly high resistance. This may mean using a single resistor biasing scheme.

and sholudnt we consider rpi of 2nd transistor

What is rpi of 2nd transistor? Don't quote abbreviations unless you say what they are.

Anyway, I'm going to leave you to it for a day or so. Good luck.

 

[aruna1]

rpi is base resistance(internal)

 

[aruna1]

finally came up with this

circuit tested(built on a PCB) and working

 

[vk6kro]

Excellent .

What is the 6.2 pF for?

What bandwidth do you get with that 6K load?

 

[aruna1]

Excellent .

What is the 6.2 pF for?

What bandwidth do yu get with that 6K load?

6.2pf is to set upper cutoff point