How to Design Various 4-bit Counters with Directional Inputs?

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Discussion Overview

The discussion revolves around designing various 4-bit counters with directional inputs, specifically focusing on synchronous counters that utilize D-Type latches. Participants are seeking assistance with the schematics and truth tables for different counter designs, including BCD and binary counters that count up or down based on directional inputs.

Discussion Character

  • Homework-related
  • Technical explanation
  • Exploratory
  • Debate/contested

Main Points Raised

  • Oliver outlines four designs for counters, specifying the requirements for BCD and binary counting, including the need for directional inputs.
  • Some participants inquire about the necessity of using D-Type latches and whether the counters are synchronous or asynchronous.
  • One participant suggests following a procedure in a textbook, including drawing state diagrams and using excitation tables for D latches to derive equations.
  • Another participant proposes using the outputs of the flip-flops to reset the counter after reaching the count of 9 in the first design.
  • There is a suggestion to create a simple counter using four flip-flops for the second design without a reset condition to count up to 15.
  • Oliver expresses difficulty in drawing the circuit schematics and requests examples for better understanding.

Areas of Agreement / Disagreement

Participants do not reach a consensus on the designs, as there are multiple approaches suggested for implementing the counters. Some participants provide specific methods while others seek further clarification and examples.

Contextual Notes

Participants mention the need for synchronous operation and the use of D-Type latches, but there are unresolved details regarding the specific circuit implementations and schematic drawings.

olimain
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Please help me urgently - D-Type Latch problem

Hi all,

I have just descovered this wonderful forum and am hoping you can save my degree! I have to have this problem finished in a matter of hours and just can't figure out the schematics/truth tables. Please please please take the time to help in any way with any part if you can - it shouldn't be too hard for some of you experts and I would be eternally grateful. Thanks in advance,

Oliver

Here are the tasks:

Design 1
Design a 4-bit BCD counter that counts from 0 to 9. After 9 the counter should cycle through the same sequence again.

Design 2
Design a 4-bit binary counter which counts in binary from 0 to 15 then cycles through the same sequence again.

Design 3
Design a 4-bit BCD counter that has a direction input (which determines the direction of the count). If direction = 0 the counter should count down, alternatively if direction = 1 then the counter counts up. The input may change at any time and the count must change appropriately at the next clock edge.

Design 4
Design a 4-bit binary counter that has a direction input (which determines the direction of the count). If direction = 0 the counter should count down, alternatively if direction = 1 then the counter counts up. The input may change at any time and the count must change appropriately at the next clock edge.
 
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Hi,

Have you no ideas what so ever?

Do you have to use d-types for the assignment?

Are the counters synchronous or asynnchronous (do they need a clock input) ?

Try researching D Type and JK counter circuits online, there's plenty of examples out there.
 
Thanks for your reply, sorry, they are synchronous (do require a clock input) and all have to use D-Type latches, not JK flipflops. I have searched the net and come up with nothing which seems to help but this website. And no, I really don't know what to do - starting to get distraught about it all!

O
 
This is not that bad, follow the procedure in your book word for word.

draw the state diagram, and use the excitation table for D latch to derive your equations.
 
For 1. - just think, you need to count from binary 0000 to 1001. After this count sequence the counter should reset. Couldn't the two outputs that are high (that represent decimal 9) be used to reset the count?
 
Thank you for your reply, and I would imagine this is how one would do it however I am stuck as to how one would draw the circuit as a schematic as digital electronics is not my strongest subject! Would anyone be able to show me an example please?

Thanks in advance.

Oliver
 
Right, managed to do design 1. Any ideas on the second?

Thanks
 
In the first counter you have to use four D- flip-flops which reset after 1001, that is as it reaches 1010 it is made into reset condition. For that you can pass the MSB flip-flop and 2 flip-flop output into a AND filter whose output is put into clear of all the flip-flops. In that way as the both the flip-flops output is 1 AND gate will pass 1 to clr of all flip-flops thus the counter is reset.
 
For the second counter make a simple counter using 4 flip-flops without reset condition and yu get the counter that counts upto 15.
 

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