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Implement a function with 2-input NAND gates

  1. Mar 3, 2015 #1
    Hello people!

    I've just done a K-Map and gotten both the SOP and POS, but have a problem with this function:

    f = acd + cab + dab + cdab + abcd ,
    f = (a+b+c+d) * (b+c+d) * (b+c+d) * (a+b) * (a+c) * (a+d)

    and got to implement it only using NAND gates with 2 inputs. Notice the underline is the negated variable.

    Thank you so much in advance.
     
  2. jcsd
  3. Mar 3, 2015 #2

    berkeman

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    Staff: Mentor

    Welcome to the PF.

    What did you get from your K-map? Do you know how to make an OR gate from NAND gates to implement your SOP solution?
     
  4. Mar 3, 2015 #3
    Hi, thanks for your answer. I got (1 / 1 / 0 / 0 ... 0 / 1 / 0 / 0 ... 1 / 0 / 1 / 0 ... 0 / 1 / 0 / 0 ) I know how yo do an OR gate from 2 variables, not for more.

    Image last number in right bottom is 0, not 1.
     

    Attached Files:

  5. Mar 4, 2015 #4

    berkeman

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    Staff: Mentor

    To build a wider OR gate, you just make a tree of 2-input OR gates...

    http://www.electronics-tutorials.ws/logic/log11.gif
    log11.gif
     
  6. Mar 4, 2015 #5
    Thanks again for helping me.
    Ok I understand the image you've attached but I have just to use NAND gates with 2 inputs.

    I upload a picture where I show you the step I'm stuck in, just in the the part when I have to add both terms.
     

    Attached Files:

  7. Mar 4, 2015 #6

    berkeman

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    You need to include the inverters as part of each OR stage. You show the final stage without those inversions...
     
  8. Mar 4, 2015 #7
    But I only have NAND gates with 2 inputs. It's a rule from the exercise.
     
  9. Mar 4, 2015 #8

    berkeman

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    Staff: Mentor

    You already show in that drawing how to use a 2-input NAND to make a NOT gate... That's how you got your first 2 NOR gate equivalents...
     
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