Is There a Simple Way to Build a Decoder for Specific Functions?

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Discussion Overview

The discussion revolves around the construction of a decoder for a specific function that maps a set of four binary inputs to a larger set of binary outputs. Participants explore the feasibility of using standard decoder ICs and logic gates to achieve the desired output configuration, which involves a significant number of output states.

Discussion Character

  • Exploratory
  • Technical explanation
  • Debate/contested
  • Mathematical reasoning

Main Points Raised

  • Tom inquires about the existence of a decoder for a specific function and seeks the simplest way to build one.
  • Some participants suggest that standard decoder ICs are not designed for specific boolean functions and require additional logic gates for customization.
  • Tom clarifies that the output must account for a specific number of bits, indicating that the "..." in the output is significant and not just a placeholder.
  • One participant hints at the potential of using a 4:16 decoder and encourages Tom to consider how its truth table differs from his requirements.
  • Another participant expresses skepticism about the simplicity of using a 4-16 decoder and suggests that achieving the desired output may require many logic gates or a programmable logic device (PLD).
  • Tom emphasizes that he is not working on a homework problem but rather on a practical circuit for an LED array.
  • Some participants propose that there may be redundant bits in Tom's design that could be simplified with fewer gates.
  • Tom reiterates the complexity of the task, stating that he has not found a simpler solution despite attempts.
  • One participant seeks clarification on whether the inputs are counting in sequence, to which Tom responds that the outputs are determined solely by the current state of the inputs, not previous states.

Areas of Agreement / Disagreement

Participants express differing opinions on the feasibility and simplicity of constructing the decoder. While some suggest potential simplifications, others remain skeptical about the practicality of achieving the desired output with fewer components. The discussion does not reach a consensus on a definitive solution.

Contextual Notes

Participants note the complexity of the output requirements, which involve 16 distinct output states based on 4 input states. There are indications of potential redundancies in the output that could be leveraged to simplify the design, but these have not been fully resolved or agreed upon.

tt1234
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Hi,

I wonder is there a decoder avalible for the following function? If not what is the simplest way to build one?



Input: 0 0 0 0 Output: 0 0 0.....0
Input: 0 0 0 1 Output: 1 0 0.....0
Input: 0 0 1 0 Output: 1 1 0.....0
Input: 0 0 1 1 Output: 1 1 1.....0


Input: 1 1 1 1 Output: 1 1 1.....1


Thanks for help!

Regards,

Tom
 
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Decoders logic ICs aren't generally designed for a specific boolean function, they more so have a pattern that is repetitive depending on your enable bits. Its your job to setup the inputs and outputs, any other logic gates, and the way you wire it up to your system to make the decoder perform your specific function.

If the "..." are don't cares, then you have 4 inputs and 4 outputs, which there are many decoders available for this.
 
Hi,

Thanks for your reply. In fact the dot counts. I should give more detail:

Input: 0 0 0 0 Output: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 0 0 1 Output: 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 0 1 0 Output: 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 0 1 1 Output: 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 1 0 0 Output: 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
.
.
.

Input: 1 1 1 1 Output: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

It needs a lot of logic gates to decode each of the output pin. I wonder if there is a simple way for it?

Thanks!

Tom
 
tt1234 said:
Hi,

Thanks for your reply. In fact the dot counts. I should give more detail:

Input: 0 0 0 0 Output: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 0 0 1 Output: 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 0 1 0 Output: 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 0 1 1 Output: 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 1 0 0 Output: 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
.
.
.

Input: 1 1 1 1 Output: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

It needs a lot of logic gates to decode each of the output pin. I wonder if there is a simple way for it?

Thanks!

Tom

I think I see a way to do it that's pretty simple. But since this is homework, I'm not allowed to just tell you the answer, or even give you the hint that I'd like to give (too simple to solve with the full hint). So here's a partial hint... What does a 4:16 decoder give you for its truth table? How is the output of the 4:16 decoder different from what you are asked to make above?
 
Hi,

I doubt there is a simple solution that can be done with a 4-16 decoder and couple of logical gates. I can get each pin with two four input logic gates and it will need total 32 gates or with a PLD. I can't figure out a simpler way but I think there could be one.

By the way, it is not a homework. I am trying to build a small circuit to drive a LED array output.

Thanks!
 
tt1234 said:
Hi,

I doubt there is a simple solution that can be done with a 4-16 decoder and couple of logical gates. I can get each pin with two four input logic gates and it will need total 32 gates or with a PLD. I can't figure out a simpler way but I think there could be one.

By the way, it is not a homework. I am trying to build a small circuit to drive a LED array output.

Thanks!
you definitely do not need 32 gates ;) If this is not a homework, then for starters I will tell you that you have a lot of redudant bits that can disappear with just 1 gate (those bits are either ALL 0 for 4 of your 5 input states, and all 1s in the 5th state which can be toggled/identified by the 3rd LSB of your input). Try simplifying your function by just looking at your truth table or breaking it up into smaller functions or you could use a truth table and karnaugh maps if you're crazy :D Again, you can probably pull this off with a decoder.
 
Hi,

I may not express the question clearly. It has more than five input/out states. It has 16 input/output states.

Input: 0 0 0 0 Output: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 0 0 1 Output: 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 0 1 0 Output: 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 0 1 1 Output: 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 1 0 0 Output: 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 1 0 1 Output: 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0.
Input: 0 1 1 0 Output: 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0.
Input: 0 1 1 1 Output: 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0.

-------Other states omitted here -----------

Input: 1 1 1 0 Output: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0
Input: 1 1 1 1 Output: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1I tried but I can't find a simple way to do it.

Tom
 
tt1234 said:
Hi,

I may not express the question clearly. It has more than five input/out states. It has 16 input/output states.

Input: 0 0 0 0 Output: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 0 0 1 Output: 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 0 1 0 Output: 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 0 1 1 Output: 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 1 0 0 Output: 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
Input: 0 1 0 1 Output: 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0.
Input: 0 1 1 0 Output: 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0.
Input: 0 1 1 1 Output: 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0.

-------Other states omitted here -----------

Input: 1 1 1 0 Output: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0
Input: 1 1 1 1 Output: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1


I tried but I can't find a simple way to do it.

Tom

keep trying, you will get it. There is a simpler way than using 32 logic gates.
 
I understand the inputs are counting in Sequence?
 
  • #10
Hi,

It works more like a decoder than a counter. The state of the 16 output are determined by the state of the four input. It doesn't count any previous states.

Tom
 

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