Log amp cascaded to anti-log amp

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Discussion Overview

The discussion revolves around the behavior of a cascaded inverting logarithmic amplifier and exponential amplifier circuit, particularly focusing on the effects of varying the gain of an inverting buffer placed between them. Participants explore the unexpected output when the buffer gain is increased and the implications for circuit design and simulation accuracy.

Discussion Character

  • Exploratory
  • Technical explanation
  • Debate/contested

Main Points Raised

  • One participant describes an experiment with a logarithmic amplifier and an exponential amplifier, noting that increasing the gain of the inverting buffer to 5 leads to unexpected output behavior.
  • Another participant points out that logarithmic and anti-logarithmic amplifiers are unipolar and require a DC offset larger than the sine wave amplitude.
  • A participant mentions the importance of knowing all DC levels and power supply voltages for accurate diagnosis of the circuit behavior.
  • Concerns are raised about the potential for the second op-amp to be in current limit or the final op-amp to be in negative saturation, affecting the circuit's performance.
  • One participant suggests that the simulation software may not accurately represent real-world behavior outside typical operational ranges.
  • Another participant proposes that increasing the gain of the inverter could be equivalent to raising the input voltage to a higher power, suggesting resistor adjustments to improve the log response.

Areas of Agreement / Disagreement

Participants express differing views on the circuit's behavior under varying conditions, particularly regarding the effects of gain adjustments and the implications for output. There is no consensus on the exact cause of the unexpected output behavior.

Contextual Notes

Participants note limitations in simulation accuracy and the necessity of understanding DC levels and operational ranges for accurate circuit analysis.

mercmalta
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Hey everybody,

I've been trying a bit of an experiment involving cascading an inverting logarithmic amp with an inverting exponential amplifier. Between them I put in an inverting buffer (see attached diagram). Now the thing is, when the inverting buffer has unity gain everything works as expected, and the output is basically an inverted copy of the input.

But when I tried giving gain of 5 to the inverting buffer the circuit started acting all wierd. Theoretically what should happen is that the input to the exponential amplifier is high enough to force its output into saturation (in this case assuming a sine wave input). But what's happening when simulating and when i built it in practice is that a non-inverted "sine wave" (i attached a screenshot) is obtained. I have no idea how this is happening, can someone please help? Thanks in advance.

Here are the equations used:

Logarithmic Amp:
V_o = -(1/40)*(ln(V_i/(I_s*R_i)))
Exponential Amp:
V_o = -R_f*I_s*e^(40V_D)
where 1/nV_T is approximately equal to 40.
 

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Log amps and anti-log amps are unipolar. The sine wave has to be on a dc offset bigger than the amplitude of the sine wave. Also, in the early days, Analog Devices made some log amps (for analog multipliers), and the best "diode" they could find was a trans-diode-connected transistor. See

http://www.analog.com/library/analogDialogue/bestof/pdf/19_1.pdf

Bob S
 
I forgot to mention that the input wave was a sine wive with 100mV peak to peak and it was given a DC offset of 150mV (for the reason you mentioned above). What I can't understand is how come when a gain of 5 is given in the inverting amp the output is not inverted. Thks
 
In this circuit it is most likely that either the second opamp will be in current limit or the final opamp in negative saturation. Depending on how realistically the parts are simulated this my or may not accurately represent the behavior of the real circuit. (as not all sim packages will accurately portray the behavior of parts outside of their most typical operational ranges)
 
I actually built the circuit and the waveform was very similair to the one viewed in the sim. I'm attaching a picture with this reply.
 

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Hi mercmalta. Could you make sure your scope is DC coupled and indicate all DC levels. It's not possible to really diagnose the circuit without knowledge of all DC levels (and the power supply voltages).
 
Let me add that I have a good theory of what's happening but I can't prove it unless I know the DC levels. I'm almost certain that the last OPAMP (U2) has it's output at negative saturation, it's inverting input no longer a "virtual earth". So current from D2 being coupled directly through R2 to the output, bypassing the opamp, and giving a non-inverting path.

I don't necessarily expect you to understand that, but I do hope you understand that opamps don't work as ideally expected under all circumstances. They require their DC inputs and output voltage and output currents to be within certain ranges, otherwise all bets are off. In your circuit, all bets are off.

BTW. Your simulation software is impressive in it's ability to give good results for the opamp outside of it's usual operating conditions.
 
mercmalta said:
...But when I tried giving gain of 5 to the inverting buffer the circuit started acting all wierd. ...
If you increase the gain of the inverter (middle opamp) by factor 5, it is equivalent to raising the input voltage V to the 5th power, e.g., V5. I suggest that all four resistors in your circuit be 100k. If you want to double the output voltage, try increasing the feedback resistor R2 on the last opamp, or halving the input resistor R1. I believe using the largest acceptable value of the input resistor R1 (and output resistor R2) will give the best log response.

Bob S
 

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