jSwathi
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I used these capacitors to reduce the DC offset voltage.CWatters said:
The discussion revolves around the design and simulation of a three-stage cascading amplifier using op-amps. Participants explore issues related to gain, saturation, and the necessity of capacitors in the circuit. The conversation includes technical details about voltage levels, power supply requirements, and the implications of using different input voltages.
Participants express differing views on the design approach and the feasibility of achieving the desired gain. There is no consensus on the correct method for calculating gain or the necessity of capacitors in the circuit.
Participants highlight limitations related to the power supply voltage and the output swing of op-amps, as well as the potential for DC offset to affect high-gain stages. The discussion reflects various assumptions about circuit design that may not be universally applicable.
Readers interested in amplifier design, op-amp configurations, and circuit simulation may find this discussion relevant, particularly those working on similar homework or project-based tasks in electronics.
I used these capacitors to reduce the DC offset voltage.CWatters said:
Tq, for the work done. Cant, we use DC input voltage and get the voltage, since while doing practically we prefer DC voltage to AC voltage. Can Even we use 10mV of input to draw the gain? Give me a solution.CWatters said:Here is my version of the circuit. My version amplifies AC only. If your source V1 is DC you need a different circuit.
I have not shown the power supply.
1) Input voltage: 0.1mV AC
2) Output voltage: 2.7V AC
3)Total gain required:2.7/(0.1*10^-3)=27000
4) I am using three stages each of gain of 30
View attachment 222592
The gain of the first stage is set by R2 and R1. Stage 2 and 3 are the same.
Capacitor C1 and R3 form a "high pass" circuit. This has a "cut-off frequency" of about 160Hz. Same for C2, R6, and C3, R9. This blocks any DC offset.
If you need a different cut-off frequency you can change C1, C2, and C3.
See also http://sim.okawa-denshi.jp/en/CRtool.php
Here is the output from the simulator. It is the frequency response for the output of stage 3 (Net1008).
View attachment 222595
The output (above the cut off frequency) is 2.9V
If the source is DC you must make these changes to my circuit.jSwathi said:Tq, for the work done. Cant, we use DC input voltage and get the voltage, since while doing practically we prefer DC voltage to AC voltage. Can Even we use 10mV of input to draw the gain? Give me a solution.