Logic gates, truth tables, circuits

[moenste]

Homework Statement

(a)

The NOR gate combination in Figure 1 acts as an AND gate. Copy and complete the truth table.

(b) An aircraft door is locked by two bolts A and B each of which operates a sensor giving a logic 1 when the bolt is fully inserted. A further sensor C gives a logic 0 output when the door is shut.

A circuit using logic gates is required to give logic output 1 only when both bolts are inserted and the door is shut.

By completing a copy of its truth table, show that the circuit of Figure 2 meets this requirement.

(c) Draw a circuit using two-input NOR gates only that performs the same logic function.

2. The attempt at a solution
(a) The truth table:

(b) I don't quite understand what is required. This is the truth table:

(c) I don't quite understand this part either. This is the graph:

and its truth table:

---

What is correct / wrong? I am not sure on (b) and (c) parts, but would also like to know whether (a) is correct or not.

 

[FactChecker]

All your work looks correct to me. It might be good in (b) to add a statement that only row 7 (A=1, B=1, C=0: both bolts A&B closed and closed door sensor C=closed) gives 1, which is what they want.
CORRECTION: The diagram in part (c) is wrong.

 

[moenste]

All your work looks correct to me. It might be good in (b) to add a statement that only row 7 (A=1, B=1, C=0: both bolts A&B closed and closed door sensor C=closed) gives 1, which is what they want.

So, regarding (b) we can rephrase the problem:

(b) An aircraft door is locked by two bolts A and B each of which operates a sensor giving a logic 1 when the bolt is fully inserted. A further sensor C gives a logic 0 output when the door is shut.

A circuit using logic gates is required to give logic output 1 only when both bolts are inserted and the door is shut.

as like: the door is locked when the output is 1 and bolts A and B have a logic of 1 and the C sensor has a logic of 0.

And then the answer is: when the only output is 1 in the seventh row, both A and B are having a logic of 1 and the C sensor has a logic of 0. Right?

And regarding (c): don't we need to get the same answer? I mean A and B should be 1, C should be 0 and the only output should be 1. And in my case I have everything the other way around: the only output is zero, A and B have 0 and C has 1. Is this OK? I am mostly unsure on (c). And putting two NORs means putting them in series, like I did, not somehow in parallel, correct?

 

[FactChecker]

Oh, sorry. I take it back. I disagree with your diagram (c). You need to use an input signal C, that is not in your diagram.

 

[moenste]

Oh, sorry. I take it back. I disagree with your diagram (c). You need to use an input signal C, that is not in your diagram.

So, (a) and (b) are correct?

Could you please explain what an input signal is?

 

[FactChecker]

So, (a) and (b) are correct?

Yes. I think so.

Could you please explain what an input signal is?

It would be a completely independent signal with values like in part (b). It should have rows with 0,1 values for every possible combination of the A and B values. The C in your original diagram was determined by A and B. That is wrong.

 

[moenste]

It would be a completely independent signal with values like in part (b). It should have rows with 0,1 values for every possible combination of the A and B values. The C in your original diagram was determined by A and B. That is wrong.

Sorry, still don't understand it. I searched for "input signal logic gate", didn't get much relevant information.

How do I need to change my graph?

 

[FactChecker]

C should be an external input on the left side, just like in the diagram (b). It should not be the result of a logic gate. You should have the exact same table A, B, C values as in (b) and your NOR-only diagram should have the exact same final values as column F in (b).

 

[moenste]

C should be an external input on the left side, just like in the diagram (b). It should not be the result of a logic gate. You should have the exact same table A, B, C values as in (b) and your NOR-only diagram should have the exact same final values as column F in (b).

Hm, let's fix the graph first.

Something like this?

 

[FactChecker]

You are using OR gates. Your diagram should only use 2 input NOR gates.

 

[moenste]

You are using OR gates. Your diagram should only use 2 input NOR gates.

I just found a similar picture online, didn't want to upoload another mine poor drawing of mine here : ).

I am mostly interested is the connection correct in the graph? (Imagine a same graph buth with circles.)

Update
Is this graph correct?

 

[FactChecker]

If in doubt, label some signals and check the truth table. I have done as much as I should on a homework question.

 

[moenste]

If in doubt, label some signals and check the truth table. I have done as much as I should on a homework question.

Thank you for your time.

That's what I have, I guess it's correct.

Once again, thank you!

 

[FactChecker]

No. For A=0 and B=0, you need one row for C=0 and another row for C=1. Same for all other combinations of A and B. As I said before, see the truth table of (b)
Also, the end result values of E are not what you want them to be. They should be the same as column F in your answer for (b)
The columns for A, B, C, and the final signal must be identical to the columns of A, B, C, and F in your answer for (b)

 

[moenste]

No. For A=0 and B=0, you need one row for C=0 and another row for C=1. Same for all other combinations of A and B. As I said before, see the truth table of (b)
Also, the end result values of E are not what you want them to be. They should be the same as column F in your answer for (b)
The columns for A, B, C, and the final signal must be identical to the columns of A, B, C, and F in your answer for (b)

I don't quite see a way to make E identical to F. Maybe the graph is wrong and I missed something?

 

[FactChecker]

This diagram is wrong if E does not match F of your answer to (b).

 

[FactChecker]

Part (a) has some examples of how to use NOR gates to negate a signal and combine signals. You need to study that and use those techniques.

 

[moenste]

This diagram is wrong if E does not match F of your answer to (b).

I can only think of

Update
And also of this:

and this:

 

[FactChecker]

The last one has input D that does not exist and its values in the truth table are wrong. Keep trying. Be methodical, there are too many options to guess at anything. You may try working backward. You want the final signal to be 1 only when A=1 and B=1 and C=0. The NOR is only 1 when both inputs are 0. Make the NOR for the final signal and manipulate the inputs as required. Then check it with a truth table.

 

[moenste]

The last one has input D that does not exist and its values in the truth table are wrong. Keep trying. Be methodical, there are too many options to guess at anything. You may try working backward. You want the final signal to be 1 only when A=1 and B=1 and C=0. The NOR is only 1 when both inputs are 0. Make the NOR for the final signal and manipulate the inputs as required. Then check it with a truth table.

I made an A B C | F table, tried to make a Boolean formula F = A * B * C' from the only 1 output present, and tried to derive a graph from it, but it all goes to a three input AND gate, there isn't much information on NOR-only gates online.

And reverse structuring isn't helping at all. How many columns are there between ABC and F? One? Two? Ten?

 

[FactChecker]

I made an A B C | F table, tried to make a Boolean formula F = A * B * C' from the only 1 output present, and tried to derive a graph from it, but it all goes to a three input AND gate, there isn't much information on NOR-only gates online.

This link shows how you can use NOR gate logic to make other types of logic: https://en.wikipedia.org/wiki/NOR_logic.
You can use these to piece together any logic you need.

And reverse structuring isn't helping at all. How many columns are there between ABC and F? One? Two? Ten?

That depends on how many intermediate steps you need to use NOR gates to get the correct logic. You may want to leave space for several intermediate logic columns between the first three inputs (A,B,C) and the final output F. Or you can start the truth table with columns (A,B,C,F) and keep tacking on columns for intermediate logic.

 

[moenste]

This link shows how you can use NOR gate logic to make other types of logic: https://en.wikipedia.org/wiki/NOR_logic.
You can use these to piece together any logic you need.That depends on how many intermediate steps you need to use NOR gates to get the correct logic. You may want to leave space for several intermediate logic columns between the first three inputs (A,B,C) and the final output F. Or you can start the truth table with columns (A,B,C,F) and keep tacking on columns for intermediate logic.

Thank you for the link. I wish I saw it earlier, could save me much time yesterday : ).

The table has 6 columns between C and J, I don't think I would manage to get the answer by going backwards.

Again, thank you for the link!

 

[FactChecker]

Excellent!
I have a small suggestion to clean it up. You are negating the C input twice in a row. That is unnecessary.

 

[moenste]

Excellent!
I have a small suggestion to clean it up. You are negating the C input twice in a row. That is unnecessary.

Yes, that's an improvement. "I" could be skipped and connected directly to "F". Thank you for the tip : ).

 

[FactChecker]

Yes, that's an improvement. "I" could be skipped and connected directly to "F". Thank you for the tip : ).

I don't think so. C doesn't need any changes. I think C can go directly into the last NOR.

 

[moenste]

I don't think so. C doesn't need any changes. I think C can go directly into the last NOR.

Oh, yes, I looked at C but somehow wrote I.