Negative PSRR of the Two-Stage Op Amp

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SUMMARY

The discussion centers on the modeling of a Two-Stage Operational Amplifier (Op Amp) to determine its Power Supply Rejection Ratio (PSRR) under different biasing conditions. Key insights include the treatment of rds7, which is modeled differently when VBias is connected to ground versus Vss, and the omission of Cgd5 from the model, which, while not affecting the outcome, raises questions about its relevance. The reference material includes lecture notes and the textbook "CMOS Analog Circuit Design" by Phillip E. Allen and Douglas R. Holberg.

PREREQUISITES
  • Understanding of Two-Stage Op Amp architecture
  • Familiarity with Power Supply Rejection Ratio (PSRR) concepts
  • Knowledge of small-signal modeling techniques
  • Basic principles of CMOS circuit design
NEXT STEPS
  • Study the impact of biasing configurations on Op Amp performance
  • Research small-signal models for CMOS devices
  • Examine the role of parasitic capacitances in Op Amp design
  • Explore advanced PSRR analysis techniques in analog circuits
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Electrical engineers, analog circuit designers, and students studying operational amplifier design and performance optimization.

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Homework Statement
Negative PSRR of the Two-Stage Op Amp with VBias Connected to ground vs connected to Vss
Relevant Equations
PSRR- model for Two-Stage Op Amp with VBias Connected to ground
From page 4-9 of this lecture note https://pallen.ece.gatech.edu/Academic/ECE_6412/Spring_2004/L180-PSRR-2UP.pdf, it gives example on how to model a Two-Stage Op Amp to find the PSRR- when VBias is connecting to ground as oppose to when VBias is connecting to Vss. One thing I don't understand is why rds7 is modelled differently given that it is connecting Vout and Vss in both cases?

Also, not sure why Cgd5 is not included in the model? although it doesn't make any difference to the outcome.

Reference:
CMOS analog circuit design. Authors: Phillip E. Allen, Douglas R. Holberg.
pg.307-309
[Link to full PDF copy of textbook redacted by the Mentors]
 
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