Optimizing Full Adder Circuit: Truth Table & Gate Count Reduction Tips

  • Context: Engineering 
  • Thread starter Thread starter The Jargon
  • Start date Start date
  • Tags Tags
    Adder Circuit
Join the discussion
Registration is free. Ask a follow-up in this thread, or start your own.
1 reply · 2K views
The Jargon
Messages
11
Reaction score
0
Heres my truth table

Code:
A|B|Cin|Sum|Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Here's my two equations from the K-maps

Sum = A+B+CIn
Cout = A.B+CIn(A+B)

Now what I want to ask is, is there a way the gate count be reduced further by sharing terms between the two output functions?

Thanks.
 
Last edited by a moderator:
Physics news on Phys.org
Nvm figured it out.