Processor instruction prefixes (number of additional clock cycles)

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The discussion focuses on the execution timing of the Intel 8086's repeat string instructions, specifically the REP MOVSx instruction. The REP prefix is noted to consume 2 clock cycles, while the MOVSx instruction alone takes 18 clock cycles. When calculating the total clock cycles for executing REP MOVSx, it is clarified that the REP prefix's 2 clock cycles are counted only once, not for each repetition. The formula for REP MOVSx execution is 9 + (17 / number of repetitions), where the 9 does not include the REP prefix. Additionally, if a segment override is used, an extra 2 clock cycles should be added, but this is only counted once for the first repetition, not for each subsequent repetition. The timing of memory reads may also affect cycle counts, as it can take 4 cycles to fetch instruction data, depending on the instruction boundary and the state of the pre-fetch queue.
SMD1990
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More specifically, this question is oriented towards the Intel 8086.

I have this manual that lists the number of clock cycles the 8086 requires to execute each of its instructions, prefixes, et cetera.

My question is about repeat string instructions. The REP prefix is listed as 2 clocks. MOVSx by itself is 18 clocks. REP MOVSx is 9 + (17 / number of repetitions).

If I wanted to count the number of clock cycles the 8086 would consume executing a REP MOVSx instruction in an instance of my code, would I include the REP prefix's 2 clocks for each repetition? Or, do I count it once, then add 9 + (17 / number of repetitions)? Or, does that 9 include the REP, meaning I should not count the prefix as consuming any clock cycles at all?

And what if I used a segment override with the REP MOVSx? Normally, I add 2 clocks for segment override. So +2 for each repetition? Just the first repetition?

Sorry. I know this is a very esoteric question. "Who cares about the 8086?" Right? I do, and I am curious about this unclear situation. So, if anyone happens to know, could they please enlighten me?



http://matthieu.benoit.free.fr/cross/data_sheets/8086_family_Users_Manual.pdf
 
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The prefix instructions only take the 2 extra cycles one time. Note that it takes 4 cycles to read memory (to fetch 16 bits of instruction data), so that 2 cycles may be 4 cycles depending on the instruction boundary, and if previous instructions were fast enough (2 to 3 cycles) to empty the pre-fetch queue. I don't know if the rep movs ... 9 cycles includes the rep overhead or not.
 
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