How to know the duty-cycle of a counter

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Discussion Overview

The discussion revolves around calculating the duty cycle and frequency of a counter circuit with a clock signal of 84 kHz. Participants explore the states and transitions of the counter, as well as the interpretation of duty cycle in the context of the given problem.

Discussion Character

  • Homework-related
  • Mathematical reasoning
  • Technical explanation

Main Points Raised

  • One participant identifies the states of the counter as 1100 - 1011 - 1010 - 1001 - 1000 - 0111, suggesting a total of 6 transitions.
  • Another participant questions the sequence of states and proposes a different last state of 0001 instead of 0111.
  • There is a discussion about the calculation of frequency, with one participant asserting that dividing the clock frequency by the number of transitions yields 14 kHz.
  • Participants express uncertainty about the duty cycle calculation, with one suggesting it should be 1/6 = 17% based on their understanding.
  • Another participant suggests plotting waveforms to better visualize the duty cycle and frequency relationships.
  • One participant recalculates the duty cycle as 2/6 = 33% after plotting the waveforms for the outputs of the counter.

Areas of Agreement / Disagreement

Participants generally agree on the frequency being 14 kHz, but there is uncertainty regarding the correct sequence of states and the calculation of the duty cycle, with multiple interpretations presented.

Contextual Notes

Participants express confusion over the duty cycle definition and calculation, indicating a need for clarification on how to derive it from the plotted waveforms. The discussion includes various interpretations of the counter's behavior and output states.

Granger
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Homework Statement


Consider the following circuit of a counter with a clock signal of 84 kHz
circuit.png


As we can see the counter counts down. Show all the states and transitions of this counter and identify all the states using a binary representation. Calculate the frequency and the duty-cycle of the signal labeled 2

Homework Equations


3. The Attempt at a Solution [/B]

So I didn't have any trouble with the first part of the problem, The states should be 1100 - 1011 - 1010 - 1001 - 1000 - 0111 and it repeats (so a total of 6 transitions).
Now the second part is the one that I'm not sure if I'm thinking correctly because this question never appeared to me.

My attempt to calculate the frequency. If I have 6 transitions all I have to do is to divide the clock frequency by the number of transitions (because If I had the period I would multiply it by the number of transitions). Anyway, I did it and obtained 14 kHz. Now the duty-cycle... I know what a duty-cycle. It's the percentage in the clock transition where the signal is high right? So it should be 1/6 = 17%...

I have no idea if I'm doing this correctly... I have a good feeling about the frequency but have no idea about the duty-cycle. Can someone give me some help? Thanks!

EDIT: The sequence is now correct
 
Last edited:
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Perhaps I'm a bit rusty but I'm struggling to understand this bit..

Granger said:
So I didn't have any trouble with the first part of the problem, The states should be 1100 - 1011 - 1010 - 1001 - 1000 - 0001 and it repeats

Shouldn't the sequence go..
1100
1011
1010
1001
1000
0111
then repeat?

As for the duty cycle.. Try plotting the wave forms for the clock and node 2 on squared paper or similar.
 
CWatters said:
Perhaps I'm a bit rusty but I'm struggling to understand this bit..
Shouldn't the sequence go..
1100
1011
1010
1001
1000
0111
then repeat?

As for the duty cycle.. Try plotting the wave forms for the clock and node 2 on squared paper or similar.

Yes, sorry I misread the last one.

Is the frequency correct?

Also for the duty cycle, I'm not getting it I'm sorry, can you be more explicit please?
 
Yes the frequency is 14KHz.

Granger said:
Also for the duty cycle, I'm not getting it I'm sorry, can you be more explicit please?

Well start by drawing the clock waveform. Then below it draw the waveform for the 4 outputs of the counter. On the first clock edge assume it's loaded with 1100. Then on the next clock edge they become 1011 etc

I would continue plotting for a bit more than one repeat (eg draw the wave forms for 8 to 10 clock cycles.

PS I haven't actually checked that the counter is counting down.
 
Thanks. So I did what you told me and obtained (naming the signal Q3Q2Q1Q0)

Q0: 010101 010101 010101 010101 010101...
Q1: 011001 011001 011001 011001 011001...
Q2: 100001 100001 100001 100001 100001...
Q3: 111110 111110 111110 111110 111110...
Now the duty-cycle should be 2/6 = 33%? Because for each signal cycle we have 2 ones and 4 zeros...
 
Last edited:
Yes that's what I make it.
 
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Nice! Thank you very much for the help!
 

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