Silicon/silicon dioxide thin fillm multistack

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Discussion Overview

The discussion focuses on the fabrication of a multilayer stack of silicon and silicon dioxide on a silicon wafer, specifically addressing techniques for achieving good optical uniformity and smooth interfaces for optical applications. Participants explore various deposition methods and their implications for layer thickness control and surface quality.

Discussion Character

  • Technical explanation
  • Debate/contested
  • Experimental/applied

Main Points Raised

  • One participant seeks advice on the best deposition technique for alternating layers of Si and SiO2, emphasizing the need for optical uniformity.
  • Another suggests researching Distributed Bragg Reflectors (DBR) and Multiple Quantum Wells (MQW) and mentions CVD as a potential method for epitaxial layers.
  • Several participants propose various deposition techniques including MBE, CVD, E-beam Evaporation, and Sputtering, noting that MBE and CVD may offer better thickness control.
  • Concerns are raised about achieving smooth and flat interfaces, with one participant mentioning the need for optical applications where scattering must be minimized.
  • Participants discuss the potential use of Chemical Mechanical Polishing (CMP) for achieving optical smoothness, with varying opinions on its effectiveness for thin films.
  • There is uncertainty about the impact of surface roughness on optical performance, with references to specific definitions of optical flatness.
  • One participant expresses concern about the limitations of available equipment and the need for a process flow to proceed with fabrication.
  • Another participant emphasizes the importance of consulting with process technicians to understand achievable uniformity and surface roughness with available equipment.

Areas of Agreement / Disagreement

Participants express differing opinions on the best deposition techniques and the effectiveness of CMP for thin films. There is no consensus on the optimal approach or the implications of surface roughness on optical performance.

Contextual Notes

Participants acknowledge limitations related to equipment access and the need for a structured process flow for fabrication. The discussion reflects varying levels of experience and knowledge regarding the techniques and their applications.

armandowww
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Hi there,
I need to fabricate a stack of layers (about 15 layers) on a 100 mm Si wafer <100> , by alternating SiO2 and Si. Each layer has been designed with a thickness of 200~800 nm plus/minus 50 nm.
At the moment I don't know the best technique for the deposition as I need to yield samples with a very good optical uniformity.

Thank you for your attention.
A.
 
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Can I recommend a search for Distributed Bragg Reflector (DBR) and/or Multiple Quantum Well (MQW) on WebOfScience or Google Scholar? While most tend to be GaAs / GaAlAs or some other direct band gap compound semiconductor and oxide, I believe you can probably search for just those papers that use silicon and silicon oxide. But if you want epitaxial layers, I believe CVD may be the way to go, unless you have access to say, an MBE machine, or some such.
 
There are a number of routes you can take: MBE, CVD, E-beam Evaporation and Sputtering could be reasonable candidates (in decreasing order of thickness control).
 
Do you mean that MBE or CVD would let me grant a good thickness control?
Actually I could execute the LPCVD LTO - Low Pressure Chemical Vapor Deposition Low Temperature Oxide.
By the way, beside the thickness control, I need the interfaces to be really smooth and flat, (so that the conditions are more restrictive than in microelectronics) since I need the samples for optical applications, i.e. interfaces in the stack should not make a light beam scatter around.
 
armandowww said:
Do you mean that MBE or CVD would let me grant a good thickness control?
Yes. Better than sputtering, I imagine.

By the way, beside the thickness control, I need the interfaces to be really smooth and flat, (so that the conditions are more restrictive than in microelectronics) since I need the samples for optical applications, i.e. interfaces in the stack should not make a light beam scatter around.
If you have lots and lots of time (and access), you could do ALD, but that may be overkill. MBE will almost certainly work and LPCVD might be good enough as well (but I'm not sure about this).
 
I'm not sure, but can you do CMP or other polishing to get optical smoothness? Unless you have other features on your wafer.

I seem to recall somewhere that optical flatness was defined as having surface roughness no greater than \frac{\lambda}{15} for frequencies of interest.

EDIT: However, I'm not sure what effect surface variations greater than that would have, as long as you achieved the surface roughness part. Maybe warped images?
 
MATLABdude said:
I'm not sure, but can you do CMP or other polishing to get optical smoothness?
Do you believe that CMP can fit? It seems to be so rude... In fact my layers are designed to be thick around 250 nm. Did you suggest me that because you have experience in polishing?
MATLABdude said:
I seem to recall somewhere that optical flatness was defined as having surface roughness no greater than \frac{\lambda}{15} for frequencies of interest.
So I can admit flatness variations not bigger than 100 nm, since the carrier wavelength is in mid IR.
MATLABdude said:
EDIT: However, I'm not sure what effect surface variations greater than that would have, as long as you achieved the surface roughness part. Maybe warped images?
I don't think so (warped images), but I would like not to care about scattering. A rough surface gives scattering and it can spoil light!
 
Well, CMP was used to polish the silicon wafers that you're starting with!

I'm not quite sure what you mean by scattering, but if you mean specular reflection versus diffuse reflection, I think that's covered in the second part, about RMS roughness. Think of say, an island which rises from the sea to a 100 ft height. Then think of the same-sized island with lots of crags and valleys, most of which have peaks of 100 ft. While the first island might not be perfectly flat, it's still fairly smooth, and clearly, the second island is much rougher (terrain wise).

Wait, before we start throwing out all these ideas, what do you actually have access to? I'm assuming you're a grad student of some sort with access to some kind of fab?
 
Of course CMP is the standard polishing technique, but I just wonder if it works for a thin film too.
On the other hand, I fear the machines I can access to are few.
I guess I have no ALD and perhaps no MBE.
Anyway those ideas must be written in a process flow in order to be allowed to do what I want ;-(.
 
  • #10
CMP would probably work (and yes, it works on thin films--it's used in dual damascene to make copper interconnects, for instance). Whether or not you'd be able to stop it in time (endpoint detection)... Well, that's a different matter. Probably a lot of trial and error. These guys (Logitech, and not the keyboard/mouse guys) make CMP machines (large and small scale):
http://www.logitech.uk.com/CMP.asp

Honestly, your best bet is probably to talk to the process technicians (or director) at your fab. They'd be able to tell you more about what uniformity and surface roughness they've actually been able to achieve on various pieces of equipment. Also, depending on how curmudgeonly above people are, if you told them what you were trying to make, and what sorts of properties were required, they'd be able to tell you what pieces of equipment you should probably be using.

Coming up with a novel process flow doesn't happen in a vacuum. So you'll need to talk to the above people, and trawl the literature to see how other people have made their DBRs or MQWs (I assume you're making one of these?) And it's much easier to refine something that's crude, rather than design something that's perfect the first go around (not that you should aim for something really crude).
 
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