Understanding the Memory Hierarchy and Its Impact on CPU Performance

[biferi]

I just was thinking somebody may be able to help me understand something about Computers.

If I have a PC and the Memory in it is 1066 MHz I know the real Clock speed 533 MHz because DDR Dabbles the Data Rate.

And if I have a CPU that is 2 GHz it is running at 2,000 MHz now this is what I do not get.

My Memory of 533 MHz is going slower then the CPU of 2,000 MHz what am I not getting?

 

[jedishrfu]

You must match the memory to the CPU. As you've found out the stuff just runs a lot slower.

A simplfied example is suppose it takes one second to get data from your memory. I ask for it and one second later it returns. My CPU however can execute code at one instruction in a third of a second. So I execute a load register command and the CPU has to wait 3 cycles ie 1 second before the data is ready to store in the register. So basically load instructions will take 3 cycles and other instructions will run 3 times faster.

With faster memory the load instructions will operate faster and the program runs quicker overall. This is a vast simplification but you can see the mismatch and how it affect instructions that must retrieve or store things in memory. This is why modern CPUs have highspeed cache memory to buffer the regular memory.

Here's one persons description of how it works:

http://www.directron.com/fsbguide.html

 

[harborsparrow]

PC's running an operating system have a very complicated memory hierarchy. The instruction or data that you are trying to execute may be in RAM already, or it may be on disk, or it may in "in RAM but paged out to disk". Each of these cases has very different retrieval times. I suggest you get a basic book on computer architecture and read about the memory hierarchy and paging. The cache memory layers, their sizes and technologies, and whether virtual memory is being used, all will affect the kind of performance you get, as well as the particular stream of data and instructions you are trying to execute. There is not enough information in the above description to understand the issue very well.