Understanding the Role of Bank Selection in PIC Microcontroller Programming

[El Moriana]

Hi there. Why is it that when programming PIC microcontrollers, you are forced to select the correct bank/page for registers like TRISA, but you can always do operations on STATUS?

From the PIC that I am using (PIC16F690) STATUS is stored in Bank 0 and TRISA is stored in Bank 1.

I get it that it's STATUS that controls which bank you are using but what makes it possible to use it whenever?

 

[JimmyAlz]

This is because of the 'A' bit in the opcode.
Not setting this bit causes the chip to use the 'access buffer',
consisting of the low part of the first RAM page and the high part of the last RAM page (I/O registers).

Your code works because STATUS is in the high part of the I/O registers page.
Accessing TRISA ,which is in the low part of the I/O registers page, requires you to use
the bank select bits.

Hmmmm doubtful that made it clearer. It took me a while to get the hang of it.
Microchips implementation of RAM in the low-end PIC's is, how shall I put it,
suboptimal.

If you have the chance switch up to the 18F series. These have the INDF/FSR registers for indirect RAM access (so you can forget about the cumbersome banking scheme).

 

[MATLABdude]

Your question may be a 'why' question... Why is STATUS readable from any bank? Because the designers thought it important enough to make it so!

'How'? That's just part of the internal connection network (probably--I don't have access to the internal details). If you're familiar with Karnaugh maps, this question is somewhat akin to asking how it's possible to address each element of a contiguous half the Karnaugh map, when, in reality, this is (usually) simpler to do than trying to address one or two elements.

 

[El Moriana]

Ok. Still a bit unclear but I get the gist of it. Thanks =)