What Are the Key Disadvantages of D-Type Bistables Beyond Timing Issues?

[braceman]

Can anyone think of big disadvantage of D-type bistables, without having to go into propagation delay/rise times and stuff like that? I'm thinking for something along the lines of the S-R flipflop and it's indeterminate state on a 1 - 1 input. The only thing I can think of myself is if we get the same input on the preset/clear inputs (depending if they both active ofc) and this will lead to an indeterminate state as well. Am I missing something obvious, but easy?

 

[berkeman]

Can anyone think of big disadvantage of D-type bistables, without having to go into propagation delay/rise times and stuff like that? I'm thinking for something along the lines of the S-R flipflop and it's indeterminate state on a 1 - 1 input. The only thing I can think of myself is if we get the same input on the preset/clear inputs (depending if they both active ofc) and this will lead to an indeterminate state as well. Am I missing something obvious, but easy?

Do you mean a D-type Flip Flop (FF)? And disadvantages compared to what?

Is this question for schoolwork? What is the context of the question?

 

[Baluncore]

Follow one RS F/F with another simple RS F/F and the "output indeterminate problem" disappears.

 

[braceman]

It's information for a work briefing project. Doesn't have to be too technical (hence why I don't need anything for delay propagation or such) as it's for non-techys. I've just got to list a general disadvantage of the D-type bistable (latch or FF). Can't find anything online that has any of that. Loads of sites listing the S-R disadvantage (the indeterminate state), but nothing on D-types.

 

[braceman]

Follow one RS F/F with another RS F/F and the "output indeterminate problem" disappears.

Yes, but then it's technically a master/slave and not a single S-R, with an indeterminate o/p problem.

 

[Baluncore]

Loads of sites listing the S-R disadvantage (the indeterminate state), but nothing on D-types.

R/S uses less power and is faster than multi-stage designs, so the simple two NOR gate cross connected RS F/F is used by designers where the input state that generates the so called "indeterminate state" will not occur, if the resulting output will be a problem.
D-type uses more power because it requires more stages.

 

[meBigGuy]

It is hard to say one has advantages over the other since they are different things, used for different purposes. The D flop generally contains two transparent latches which are made from SR latches.

If you want to capture information only on the rising edge of a signal, you need a D flop. Its clock input is sensitive to clock glitches and switch bounce.

If you want something that remembers that the set or reset was last applied, then you want SR. SR's can be used to reliably debounce SPDT switches, for example.

Seem you are forgetting the transparent latch, which is a gated SR. It is transparent when the G (or ENABLE) input is asserted, and remembers the output state when when G is de-asserted. That is probably the most useful latch form. Pure SR's don't get used very often in ASIC digital design. I see them mostly in analog control circuits. Transparent latches, on the other hand, form the basis for dynamic clockgating in modern low power design.

 

[braceman]

Well, I don't have to list them versus each other, just give an example of a disadvantage of each one by itself. IE - the SR has the indeterminate state. Could you say the fact the D has only one 'input' be classed as a disadvantage in itself? Obviously if you needed more than one input you would pick a different bistble, but I don't have to go that far. Just a simple 'this is a D-type and it can do xxxx but has this disadvantage...'

 

[meBigGuy]

Don't know how to answer. Both have vulnerabilities.

I think when you are referring to the 11 vulnerability it has to do with both SR inputs going to 1 at the same time. That is a race condition. Race conditions can exist in any flop/latch type.

The only true disadvantage is if one won't do what you need. The both have their purposes, ie, their logical function. They both have race/timing vulnerabilities.
I guess the only real disadvantages are the advantages that only the other type has.

 

[braceman]

I know, it's a weird one. My old notes from college days has a big 'this is the problem with the SR bistable' part, but absolutely nothing for D-type, and getting nothing on internet search about it.

 

[meBigGuy]

One advantage of the D flop is that it needs a clock. If you don't have a clock or don't need a clock that is a disadvantage. You list all the advantages, they can become disadvantages.

D flop Vulnerabilities are all centered around meeting clock pulse-width, data setup, data hold, reset recovery requirements, minimum clock slew rate. Q and QN Data outputs of a D flop are not generally matched for delay/rise-fall times.

SR latch has some of the same issues. the S/R minimum pulse width, S/R timing (1-1 issue).

 

[Baluncore]

The reason why we have different types of F/F is because they have different characteristics.
They do not have advantages and disadvantages. They have features and preferred applications.
The misapplication of a particular type of F/F is an engineering design problem or error.

What are the advantages and disadvantages of snakes, sheep, cattle, horses or lions?
They are all animals, but they are different. Each has it's place.